Patents Assigned to Circuit Integration Technology, Inc.
  • Patent number: 5581098
    Abstract: A structure for routing connections in a semiconductor circuit constructed on a silicon wafer substrate, and a method for making that structure. The routing structure is constructed using two layers of electrical conductors and a set of interlayer connectors, but one of the electrical connection layers is predetermined and need not be programmable. The fixed electrical connection layer is laid out with a plurality of preselected routing connections, such as a set of horizontal or "east-west" connections laid out in a predetermined pattern. The variable electrical connection layer is programmed to make use of the preselected routing connections to connect disparate locations within the circuit on the semiconductor wafer, such as by making vertical or "north-south", and also horizontal, connections to selected horizontal connectors. The pattern of horizontal connections comprises a plurality of horizontal lines, with vertical spacing between pairs of neighboring lines.
    Type: Grant
    Filed: May 5, 1995
    Date of Patent: December 3, 1996
    Assignee: Circuit Integration Technology, Inc.
    Inventor: Ted Chang