Patents Assigned to Circuit Semantics, Inc.
  • Patent number: 6499129
    Abstract: A technique to verify, evaluate, and estimate the performance of an integrated circuit is embodied in a computer software program that is executable by a computer system. The technique accurately estimates of the performance (e.g., transient delays) of an integrated circuit, and has fast execution times. The technique is applicable to small circuits having relatively few transistors, and especially well suited for integrated circuits having millions of transistors and components. The technique handles the effects of deep-submicron integrated circuit technology.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: December 24, 2002
    Assignee: Circuit Semantics, Inc.
    Inventors: Arvind Srinivasan, Haroon Chaudhri, Alexandre Zavorine