Patents Assigned to Clear Logic
  • Patent number: 6228564
    Abstract: A method for patterning a layer of photoresist includes the steps of 1) exposing the photoresist through a standard precision mask to define all possible patterns and features, and 2) selecting desired patterns and features with a non-precision targeting energy beam or mask. Consequently, no custom precision masks are required to pattern the various layers of photoresist during the fabrication of application specific integrated circuits (ASICs), thereby reducing both the lead-time and costs for manufacturing ASICs.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: May 8, 2001
    Assignee: Clear Logic
    Inventor: Alan H. Huggins