Abstract: A memory module includes a mother board with an edge connector mounted adjacent one of its edges. Memory chips are mounted on the same side of the mother board as the edge connector. A daughter board, having memory chips mounted on its surface facing the mother board, is connected to the mother board so that its maximum height above the mother board is substantially no greater than that of the edge connector. Preferably the memory chips are mounted in thin TSOP packages and the daughter board is connected to the mother board by two rows of mating electrical pins and sockets, one located near the edge connector and the other near the top of the mother board, so the daughter board is mounted over virtually all of the width of the mother board except that covered by the edge connector, and so that the rows of mating connectors and the facing surfaces of the mother and daughter boards form an air channel through which air can flow to cool the memory chips mounted between the mother and daughter boards.

Abstract: A bus device of a first type uses a first arbitration protocol. The first-type device is designed for use in a computer system having a communications bus, and one or more other bus devices connected to the bus, including possible first-type bus devices which also use the first arbitration protocol and one or more second-type bus devices which use a second, different, arbitration protocol. The first-type bus device includes a protocol specific memory for storing information; means for monitoring the bus to determine whether the current bus master of the bus arbitrated in the manner of the first or second arbitration protocols; and means for denying the current bus master the ability to access information stored in the protocol specific memory if the means for monitoring determines the bus master arbitrated according to the second arbitration protocol.

Abstract: A first-type bus device is designed for use in a computer system having one or more second-type bus devices. The second-type devices practice a round robin arbitration scheme, but the first type devices do not. According to the round-robin scheme, a second-type device which wins an arbitration asserts its ID on the system bus, each second-type device seeking to arbitrate compares its ID with that asserted by the current bus master, and uses that comparison to determine whether to assert its ID during arbitration in a high or low priority manner. The first-type bus device includes means for assuring that first-type and second-type devices never arbitrate at the same time. During arbitration, first-type devices only assert their ID number in one priority. Unlike second-type devices, they cannot assert their ID either in a high or low priority manner.

Abstract: A bus device of a first type is designed to work with a bus devices of a second type. A bus device of the second type, when it is a slave in a bus transaction, issues an ACK if it can respond to the command on time, a NO ACK if it can't respond at all, a STALL if it expects to be able to respond with only a short delay, and a RETRY if it expects to be able to respond, but only after a long delay. Slave Bus devices of the second type also monitor the length of time that they assert the STALL signal, and if they assert if for more than a predetermined period, they replace the STALL signal with a RETRY. Bus devices of the second type, when they are master in a bus transaction, respond to a NO ACK by terminating a transaction in one way and to a RETRY by terminating the transaction in a different way.

Abstract: An image enhancement system and method includes means for superimposing a second image, such as a hair style image, over portions of a first image, such as an image of a person's face. The system or method further automatically marks locations along the boundary between the first and second images and automatically calls a graphic smoothing function in the vaccination of the marked locations, so the boundary between the images is automatically smoothed. Preferably, the smoothing function calculates a new color value for a given pixel in the vicinity of such a marked location in at least two smoothing steps, the first of which calculates the color value for each of a plurality of pixels adjacent to the given pixel by combining color values from pixels which are separated, respectively, from each of those plurality of pixels by a distance of more than one pixel. The second step calculates the new color value for the given pixel by combining the color value of each of the plurality of pixels.

Abstract: A bus device, such as a memory board, is provided with a mother board and a daughter board mount at a predetermined distance above the surface of the mother board. The daughter board has integrated circuit components, such a memory chips, mounted on both of its sides. Means are provided for connecting the wires on the daughter board with those of the mother board and for connecting the wires on the mother board with the conductors of a system bus. In the preferred embodiment of the invention the distance at which the daughter board is mounted above the surface of the mother board is less than twice the maximum thickness of the electronic components mounted on the side of the memory board facing the mother board. The portion of the mother board under these components contains no electronic components itself. Instead, that portion of the mother board contains at least one ventilation opening to ventilate the components on the side of the daughter board that faces the mother board.