Abstract: A circuit for limitation of maximum current delivered by a power transistor comprises: a network for detection of the current delivered by the power transistor which generates a first electrical signal; a reference network for generating a reference current proportional to a resistor and self-limited, provided by means of a current generator circuit and a limiting circuit with current mirror; and an operational amplifier which compares the first electrical signal with the reference current and which tends to inhibit the power transistor if the current delivered exceeds a certain threshold value.
Type:
Grant
Filed:
February 27, 1997
Date of Patent:
September 8, 1998
Assignee:
Co.Ri.M.Me.-Consorzio per la Ricerca sulla Microelettronica nel Messogiorno