Patents Assigned to CO
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Patent number: 12080732Abstract: An imaging device including a semiconductor substrate; a photoelectric converter that converts incident light into a signal charge, the photoelectric converter being stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground. The transistor is configured to switch between a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter.Type: GrantFiled: April 21, 2023Date of Patent: September 3, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Masashi Murakami, Kazuko Nishimura, Yutaka Abe, Yoshiyuki Matsunaga, Yoshihiro Sato, Junji Hirase
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Patent number: 12079974Abstract: An image processing method, where a target area and a background area are determined in an image by performing mask segmentation on the image. Different color processing modes are applied to the target area and the background area, such that luminance of the target area is greater than luminance of the background area, or chrominance of the target area is greater than chrominance of the background area, and a main object corresponding to the target area is more prominently highlighted. This enables a terminal user to have a movie special effect during photographing or video photographing, and improves photographing experience of the user. In addition, the present disclosure further provides a flicker elimination method, such that a color change of video content is smoother and more natural.Type: GrantFiled: April 15, 2021Date of Patent: September 3, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Yu Li, Feilong Ma, Tizheng Wang, Xiujie Huang
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Patent number: 12080063Abstract: The present invention provides a display method, a display system, and a readable storage medium for plant disease diagnosis information. The method comprises: acquiring a plant image; using a disease location detection model to recognize and process the plant image, so as to determine whether the plant image has a suspected disease area; if a result recognized by the disease location detection model indicates that there is at least one suspected disease area, marking and displaying the suspected disease area according to a first preset mode; using a disease diagnosis model to recognize and process the plant image, so as to acquire species information and determine whether the plant image has a suspected disease; and if a result recognized by the disease diagnosis model indicates that there is at least one suspected disease, performing information display regarding the suspected disease according to a second preset mode.Type: GrantFiled: January 21, 2024Date of Patent: September 3, 2024Assignee: Hangzhou Ruisheng Software Co., Ltd.Inventors: Qingsong Xu, Qing Li
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Patent number: 12080239Abstract: A display device includes: a charge sharing controller to generate the plurality of group switch control signals based on first bits of (K?1)th digital data groups and second bits of digital data groups. The (K?1)th digital data groups correspond to pixel values of a (K?1)th row of the display panel. The Kth data digital groups correspond to pixel values of a Kth row of the display panel. The charge sharing controller is configured to, with respect to each of the plurality of source line groups, activate each of the plurality of group switch control signals to perform the charge sharing in response to the first bits satisfying a first condition, and the first bits and the second bits satisfying a second condition. The first bits and the second bits are not compared to each other to output a count value.Type: GrantFiled: August 24, 2023Date of Patent: September 3, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyunghoon Chung, Jihoon Kim, Yongsoo Lee, Jihyun Lee, Minje Hyun
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Patent number: 12080560Abstract: Methods for forming a 3D memory device are provided. A method includes the following operations. A stack structure is formed in a staircase region and an array region. A dielectric material layer is formed over the array region and the staircase region. An etch mask layer is coated over the dielectric material layer. The etch mask layer, on a first surface away from the dielectric material layer, is planarized. The dielectric material layer and a remaining portion of the etch mask layer are etched to form a dielectric layer over the staircase region and the array region.Type: GrantFiled: October 11, 2021Date of Patent: September 3, 2024Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Yonggang Yang, Xiaohong Zhou
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Patent number: 12080760Abstract: An SiC semiconductor device includes an SiC semiconductor layer having a first main surface and a second main surface, a gate electrode embedded in a trench with a gate insulating layer, a source region of a first conductivity type formed in a side of the trench in a surface laver portion of the first main surface, a body region of a second conductivity type formed in a region at the second main surface side with respect to the source region in the surface layer portion of the first main surface, a drift region of the first conductivity type formed in a region at the second main surface side in the SiC semiconductor layer, and a contact region of the second conductivity type having an impurity concentration of not more than 1.0×1020 cm?3 and formed in the surface layer portion of the first main surface.Type: GrantFiled: August 5, 2019Date of Patent: September 3, 2024Assignee: ROHM CO., LTD.Inventors: Yuki Nakano, Masatoshi Aketa, Takui Sakaguchi, Yuichiro Nanen
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Patent number: 12080375Abstract: Circuits and methods for compensating mismatches in sense amplifiers are disclosed. In one example, a circuit is disclosed. The circuit includes: a first branch, a second branch, a first plurality of trimming transistors and a second plurality of trimming transistors. The first branch comprises a first transistor, a second transistor, and a first node coupled between the first transistor and the second transistor. The second branch comprises a third transistor, a fourth transistor, and a second node coupled between the third transistor and the fourth transistor. The first node is coupled to respective gates of the third transistor and the fourth transistor. The second node is coupled to respective gates of the first transistor and the second transistor. The first plurality of trimming transistors is coupled to the second transistor in parallel. The second plurality of trimming transistors is coupled to the fourth transistor in parallel.Type: GrantFiled: August 10, 2023Date of Patent: September 3, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ku-Feng Lin, Yu-Der Chih, Yi-Chun Shih, Chia-Fu Lee
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Patent number: 12080665Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a peripheral circuit. The second semiconductor structure includes an array of memory cells and a plurality of bit lines coupled to the memory cells and each extending in a second direction perpendicular to the first direction. Each of the memory cells includes a vertical transistor extending in a first direction, and a storage unit coupled to the vertical transistor. The vertical transistor includes a semiconductor body extending in the first direction, and a gate structure in contact with two opposite sides of the semiconductor body in the second direction. A respective one of the bit lines and a respective storage unit are coupled to opposite ends of each one of the memory cells in the first direction.Type: GrantFiled: December 16, 2021Date of Patent: September 3, 2024Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Hongbin Zhu, Wei Liu, Yanhong Wang, Ning Jiang
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Patent number: 12078567Abstract: A refuse vehicle includes a telescopic arm, a sensor, and a processor. The telescopic arm includes an outer boom defining a bore, an inner boom received in the bore of the outer boom, and a bearing pad received in the bore and located between an exterior surface of the inner boom and an interior surface of the outer boom. The sensor is configured to output data indicating a position of a load-bearing limb of the telescopic arm. The processor is configured to receive data output from the sensor and determine a wear-state of the bearing pad based on the position.Type: GrantFiled: May 25, 2022Date of Patent: September 3, 2024Assignee: The Heil Co.Inventors: John Forrest Smith, Garrett J. Eckerl
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Patent number: 12081019Abstract: An abnormality determining section disconnects both a positive wire and a negative wire between a load module and a second ground circuit, connects one of a positive wire or a negative wire between a main power source apparatus and the second ground circuit, and determines whether there is an abnormality in a second main power source circuit based on an amount of power supplied to the second ground circuit in a state where one of the positive wire or the negative wire of the second main power source circuit is connected to a reference potential by the second ground circuit.Type: GrantFiled: March 29, 2023Date of Patent: September 3, 2024Assignee: HONDA MOTOR CO., LTD.Inventors: Manabu Mitani, Masataka Yoshida
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Patent number: 12075989Abstract: A puncture device guide includes a guide platform configured to releasably attach to an ultrasound probe, a guide tower slidingly coupled to the guide platform, and a needle holder device for coupling to a puncture device. The guide tower projects upwardly from the guide platform and includes a vertical guidance slot and a plurality of attachment positions for engaging the needle holder device.Type: GrantFiled: November 22, 2021Date of Patent: September 3, 2024Assignee: CIVCO Medical Instruments Co., Inc.Inventors: Willet Whitmore, Tim Meder, Paul Smith, Sam Moody, Hannah Pankow, Mackenzie Myhre, Caroline Myrand
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Patent number: 12079396Abstract: Embodiments of the present disclosure relate to a display apparatus. The display apparatus includes: a display; a user interface; and a controller, configured to perform: in response to a user input, synchronizing menu content data set under a current source to other sources, so that the other sources can obtain the same display effect as that under the current source. Unnecessary repeated setting is avoided, and convenience is brought to users in use.Type: GrantFiled: April 7, 2023Date of Patent: September 3, 2024Assignee: HISENSE VISUAL TECHNOLOGY CO., LTD.Inventor: Zhiyong Zhang
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Patent number: 12082391Abstract: A memory device with large storage capacity is provided. A NAND memory device includes a plurality of connected memory cells each provided with a writing transistor, a reading transistor, and a capacitor. An oxide semiconductor is used in a semiconductor layer of the writing transistor. The reading transistor includes a back gate. When a reading voltage is applied to the back gate, information stored in the memory cell is read out.Type: GrantFiled: September 25, 2020Date of Patent: September 3, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoru Ohshita, Hitoshi Kunitake, Kazuki Tsuda
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Patent number: 12082415Abstract: A semiconductor device includes a substrate, a lower stack structure on the substrate and including lower gate electrodes stacked apart from each other, an upper stack structure on the lower stack structure and including upper gate electrodes stacked apart from each other, a lower channel structure penetrating through the lower stack structure and including a lower channel layer, and a lower channel insulating layer on the lower channel layer the lower channel insulating layer surrounding a lower slit, and an upper channel structure penetrating through the upper stack structure and including an upper channel layer and an upper channel insulating layer on the upper channel layer, the upper channel insulating layer surrounding an upper slit. A width of the lower slit is greater than a width of the upper slit, and a thickness of the lower channel insulating layer is greater than a thickness of the upper channel insulating layer.Type: GrantFiled: July 14, 2021Date of Patent: September 3, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Jimo Gu, Bumkyu Kang, Sungmin Hwang
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Patent number: 12079580Abstract: An information extraction method, an extraction model training method, an apparatus and an electronic device all relate to knowledge graphs. A specific implementation includes acquiring an input text and determining a semantic vector of the input text according to the input text. Such implementation also includes inputting the semantic vector of the input text to a pre-acquired extraction model to obtain a first enhanced text of the input text. The first enhanced text is a text with a text score greater than a preset threshold output by the extraction model. The extraction model performs text extraction based on the semantic vector of the input text. Since the semantic vector has rich context semantics, the enhanced text extracted by the extraction model can be more in line with the context of the input text.Type: GrantFiled: June 15, 2021Date of Patent: September 3, 2024Assignee: Beijing Baidu Netcom Science Technology Co., Ltd.Inventors: Tao Huang, Baohui Wang, Li Liu, Litao Zheng
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Patent number: 12080567Abstract: In an embodiment, a method includes: immersing a wafer in a bath within a cleaning chamber; removing the wafer out of the bath through a solvent and into a gas within the cleaning chamber; determining a parameter value from the gas; and performing remediation within the cleaning chamber in response to determining that the parameter value is beyond a threshold value.Type: GrantFiled: July 26, 2022Date of Patent: September 3, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Chun Hsu, Shu-Yen Wang, Chui-Ya Peng
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Patent number: 12082459Abstract: A display apparatus includes: a substrate having a transmission area and a display area surrounding the transmission area; a plurality of display elements in the display area; a horizontal line extending in a first direction in the display area; a plurality of first vertical lines and a plurality of second vertical lines extending in a second direction intersecting the first direction and being apart from each other with the transmission area therebetween; a first connection line connecting at least one of the plurality of first vertical lines to at least one of the plurality of second vertical lines and bypassing the transmission area; and a second connection line connecting at least one of the plurality of first vertical lines to at least one of the plurality of second vertical lines and bypassing the transmission area, the second connection line being on a layer different from the first connection line, wherein a curvature of the first connection line is different from a curvature of the second connectionType: GrantFiled: April 26, 2021Date of Patent: September 3, 2024Assignee: Samsung Display Co., Ltd.Inventors: Seulbee Lee, Minchae Kwak, Byungsun Kim, Seunghan Jo
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Patent number: 12081851Abstract: A camera module comprising: a housing; a lens assembly that is fixed to the housing and comprises at least one lens; a circuit board that is arranged inside the housing and comprises a first circuit board and a second circuit board, on which image sensors arranged to face the lens are mounted, respectively; and a first shield can arranged inside the housing so as to support edges of the first and second circuit boards.Type: GrantFiled: June 6, 2023Date of Patent: September 3, 2024Assignee: LG INNOTEK CO., LTD.Inventor: JeKyung Park
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Patent number: 12080646Abstract: A method having a semiconductor substrate received and a first dielectric layer is formed over the semiconductor substrate. A trench is formed in the first dielectric layer. The trench is filled to form a conductive layer in the first dielectric layer. The conductive layer is segmented to form a first conductive feature and a second conductive feature separated from each other by a recess. The recess is filled with a second dielectric layer, such that one or both of the conductive features are end-capped by a portion of the first dielectric layer and a portion of the second dielectric layer.Type: GrantFiled: August 8, 2023Date of Patent: September 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Lin-Yu Huang, Li-Zhen Yu, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
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Patent number: 12082131Abstract: The present disclosure relates to time synchronization methods and apparatus. In one example method, a terminal receives a system information block (SIB) sent by a distributed unit (DU), where the SIB is generated by the DU, the SIB includes time information, and the time information indicates a moment corresponding to a boundary of a system frame number (SFN) at which an end boundary of a system information (SI) window for sending the SIB is located, or indicates a moment corresponding to a boundary of an SFN immediately after an end boundary of an SI window for sending the SIB. The UE processes the time information to obtain a time reference.Type: GrantFiled: July 1, 2021Date of Patent: September 3, 2024Assignee: Huawei Technologies Co., Ltd.Inventors: Xiaoying Xu, Qufang Huang, Feng Han