Patents Assigned to CODASIP S.R.O.
  • METHOD FOR AUTOMATIC PROCESSOR DESIGN, VALIDATION, AND VERIFICATION
    Publication number: 20220335186
    Abstract: A method for automatic design of a processor and programming and simulation tools, comprising developing a single model of a processor from processor's specifications; providing the single model of the processor to an Electronic Design Automation tool, which automatically generates a hardware description and programming and simulation tools from the single processor model, and automatically determines validity of the single model of the processor, is disclosed. The method further comprises automatic verification of the designed processor.
    Type: Application
    Filed: April 14, 2021
    Publication date: October 20, 2022
    Applicant: Codasip, s.r.o.
    Inventor: Zdenek Prikryl
  • Method and an apparatus for automatic processor design and verification
    Patent number: 9235669
    Abstract: A method and a system embodying the method for automatic application-specific instruction-set processor design and verification, comprising generating programming and simulation tools in accordance with application-specific instruction-set processor specifications automatically by an Electronic Design Automation tool; generating a reference model and a hardware description of the application-specific instruction-set processor in accordance with the application-specific instruction-set processor specifications automatically by the Electronic Design Automation tool; and verifying the hardware description against the reference model is disclosed.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: January 12, 2016
    Assignee: CODASIP S.R.O.
    Inventors: Zden{hacek over (e)}k P{hacek over (r)}ikryl, Adam Husár, Karel Masa{hacek over (r)}ík, Tomá{hacek over (s)} Hru{hacek over (s)}ka
  • Method and an apparatus for automatic generation of verification environment for processor design and verification
    Patent number: 9235670
    Abstract: A method and a system embodying the method for automatic generation of a verification environment, comprising providing a first model of an application-specific instruction-set processor; providing a second model of the application-specific instruction-set processor; and generating automatically the verification environment from the first model and the second model is disclosed.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: January 12, 2016
    Assignee: CODASIP, s.r.o.
    Inventors: Zden{hacek over (e)}k P{hacek over (r)}ikryl, Marcela {hacek over (S)}imková, Karel Masa{hacek over (r)}ík
  • METHOD AND AN APPARATUS FOR AUTOMATIC PROCESSOR DESIGN AND VERIFICATION
    Publication number: 20150234965
    Abstract: A method and a system embodying the method for automatic application-specific instruction-set processor design and verification, comprising generating programming and simulation tools in accordance with application-specific instruction-set processor specifications automatically by an Electronic Design Automation tool; generating a reference model and a hardware description of the application-specific instruction-set processor in accordance with the application-specific instruction-set processor specifications automatically by the Electronic Design Automation tool; and verifying the hardware description against the reference model is disclosed.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Applicant: CODASIP S.R.O.
    Inventors: Zdenek Prikryl, Adam Husár, Karel Masarík, Tomás Hruska
  • METHOD AND AN APPARATUS FOR AUTOMATIC GENERATION OF VERIFICATION ENVIRONMENT FOR PROCESSOR DESIGN AND VERIFICATION
    Publication number: 20150234966
    Abstract: A method and a system embodying the method for automatic generation of a verification environment, comprising providing a first model of an application-specific instruction-set processor; providing a second model of the application-specific instruction-set processor; and generating automatically the verification environment from the first model and the second model is disclosed.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Applicant: Codasip s.r.o.
    Inventors: Zdenek Prikryl, Marcela Simková, Karel Masarík