Patents Assigned to Cogency Semiconductor Inc.
  • Patent number: 6756772
    Abstract: A step-down switching voltage regulator with a push-pull output stage is adapted to provide a voltage converter with an auxiliary voltage rail that supplies an auxiliary voltage that is higher than the input supply voltage. The push-pull output stage of the step-down voltage regulator is used to drive a charge pump voltage-doubler circuit. In this way, a single integrated topology provides a regulated low voltage output as well as an auxiliary high voltage output. The circuit topology enables a low component count resulting in lower component cost and smaller physical size.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: June 29, 2004
    Assignee: Cogency Semiconductor Inc.
    Inventor: Donald Mike McGinnis
  • Publication number: 20030235254
    Abstract: A method and apparatus for detecting a channel jammed by narrowband jamming interference in a block oriented digital transmission system such as an orthogonal frequency division multiplexing (OFDM) or discrete multi-tone (DMT) system. A spectrum of a received data bearing signal is examined to identify areas of the spectrum that are likely corrupted by a narrowband jamming interference. The method identifies jammed channels by applying a boxcar filter, in order to identify narrow peaks in the spectrum that are substantially larger in magnitude than adjacent channels. Channels identified as jammed or affected by a jamming signal, are listed in a jam mask used for screening out corrupted channels during data transmission.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Applicant: Cogency Semiconductor Inc.
    Inventors: John Louis Fanson, Douglas Hamilton Taylor, Bradley Robert Lynch
  • Publication number: 20030215032
    Abstract: An analog signal gain control circuit(ASGC) for a digital radio HomePlug orthogonal frequency division multiplexing (OFDM) receiver includes a digital variable gain amplifier (DVGA) to control the gain of a received signal to achieve a desired signal amplitude to match a dynamic range of an analog-to-digital converter (ADC), an inverse scaling stage controlled to inverse-scale the signal output by the ADC, and a two-stage fast attack and slow decay filter that outputs control signals to the DVGA and to the inverse scaling stage. The fast attack and slow decay filter rapidly responds to an increase in signal amplitude and slowly decays the amplitude of the control signal in response to a decrease in input signal amplitude.
    Type: Application
    Filed: May 15, 2002
    Publication date: November 20, 2003
    Applicant: Cogency Semiconductor Inc.
    Inventors: Brian James Langlais, Akrum Elkhazin, John Fanson, Bradley Robert Lynch, Xi Chu