Abstract: An asynchronous stack apparatus and method is provided that reduces power consumption that maintains a constant response time regardless of the number of stored items. The asynchronous stack apparatus uses a token and control circuits to indicate a current tope of stack and process data input/output. The asynchronous stack apparatus includes a communication device, a plurality of storage units and a token control circuit.

Abstract: A control apparatus and method is provided for controlling operations of functional units in systems. The control apparatus and method implement a set of operations that can include dependencies between the functional units of a system to complete each operation. For example, in an asynchronous digital processor, self-timing and inter-block communication are used to implement a self-timed scheduler. The self-timed scheduler and method implement an instruction set using a plurality of functional units of the asynchronous digital processor. A scheduler can include a scheduler decoder that decodes each instruction to generate functional unit schedule and control information, a communication device and a plurality of scheduler functional unit controllers, wherein each of the scheduler functional unit controllers corresponds to one of the plurality of functional units of a system.

Abstract: A power consumption control apparatus and method for an asynchronous system is provided that reduces power consumption by selecting one of a plurality of power consumption levels for the system. The power consumption levels can be determined based on work load requirements of the system and can be implemented for the system or portions thereof using a single block of the system. The asynchronous system includes a plurality of intercoupled functional units and a power control circuit coupled to a selected one of the plurality of functional units to determine at least one of a first and a second operating speed of a selected functional unit.

Abstract: A programmable circuit and method for a data processing apparatus is provided that allows an entire instruction or instruction set to be modified. According to the present invention, the instruction can be modified, for example, during initialization or execution. The programmable circuit for a data processing apparatus can include a plurality of functional units, each functional unit performing a set of prescribed operations. A programmable circuit that is capable of modifying an entire instruction. A controller that decodes a current instruction to perform a corresponding instruction task using the plurality of functional units and a communications device coupling the functional units, the programmable circuit and the controller.