Patents Assigned to Combasis Technology, Inc.
  • Patent number: 7424738
    Abstract: Limiting RF signal reception outside of a perimeter boundary to enhance security in a wireless network. A central jamming controller (CJC) communicates with one or more access points within a wireless network to determine if link activity is present within a cell controlled by a specific access point. Link activity comprises transmissions from an authorized communication device (ACD) to the access point and transmissions from the access point to the ACD. When link activity is detected, the CJC directs a jamming antenna system to produce a jamming signal and to transmit the jamming signal outside of the perimeter boundary defined by the WLAN. The jamming signal comprises noise transmitted within the bandwidth of the channel being used by the access point and the ACD to communicate within the cell. An unauthorized communication device (UCD) outside of the perimeter boundary will be prevented from receiving the communication between the access point and the ACD because of the jamming signal.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: September 9, 2008
    Assignee: Combasis Technology, Inc.
    Inventors: Hyokang Chang, Ashim K Roy
  • Patent number: 6996767
    Abstract: A memory configuration scheme that enables parallel decoding of a single block of turbo-encoded data is described. In this scheme a single code block is divided into multiple subblocks and decoding is performed on subblocks in parallel. The turbo decoder memory is configured so that subblock decoders can access the common memory resources independently of each other. This scheme is different from existing parallel decoding schemes in that it achieves the parallel implementation by applying multiple decoders to a single code block, not by assigning multiple decoders to multiple code blocks. The advantages of this scheme include minimum memory requirement and minimum decoding latency. The minimum memory requirement results from the fact that it needs memory resources only for a single code block regardless of the number of decoders used. The decoding latency is minimum since decoding of a code block is over when decoding on subblocks is completed.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: February 7, 2006
    Assignee: ComBasis Technology, Inc.
    Inventors: Hyokang Chang, Seok Ho Kim
  • Patent number: 6950975
    Abstract: System and method for accelerating the convergence rate of turbo decoding by verifying bits in data frames whose CRC shows no bit errors. Verified bits are translated to bound nodes on a trellis of nodes representing a sequence of bits of the encoded code block. Verification of all bits signals a stop condition and decoding iterations can be terminated. Further, state transition metrics are limited when a node is adjacent to a bound node, allowing for acceleration of convergence by elimination of impossible state transitions. Also disclosed is a scheme to detect bit errors when the code block contains unframed data or partial data frames. This bit error detection scheme uses a recursive encoder to establish end node status. The end node state determination accelerates convergence rate recognition when incorporated with other stop conditions.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: September 27, 2005
    Assignee: Combasis Technology, Inc.
    Inventors: Hykong Chang, Seok Ho Kim