Abstract: A connector device for use in communication of data between the central processing unit (CPU) bus of a host computer system and the CPU bus of a co-processor computer system, between the CPU bus of the host computer system and an expansion card used with the host computer system, and between the CPU bus of the co-processor computer system and an expansion card used with the co-processor computer system using a bridge card includes a plurality of host computer system expansion slots and a plurality of co-processor computer system expansion slots configured so that at least one host computer system expansion slot and at least one co-processor computer system expansion slot form an in-line pair to accept the bridge card.
Abstract: A computer that provides data to a video display using a bitmap display memory organization and bitplane addressing. Separate control is provided for two bitplane backgrounds and for eight reusable and easily movable sprites. Additional logic allows for dynamically-controllable interobject priority and collision detection among data in each of the bitplane backgrounds and sprites. A coprocessor provides for video beam-synchronized changes to data in registers, freeing the main processor for general purpose computing tasks. A block image transfer is provided to rapidly copy data in large blocks from one memory location to another. In hold-and-modify mode, color output circuitry holds the value for a previously displayed pixel while bitplane data modifies those values, allowing for simultaneous display of a greatly increased number of colors.
July 18, 1986
Date of Patent:
October 17, 1989
Jay G. Miner, Dave Dean, Joseph C. Decuir, Ronald H. Nicholson, Akio Tanaka
Abstract: A peripheral control circuit for a computer system. Independent control and interface circuits are provided for left and right audio channels, for a communications port, for storage media, and for joysticks or paddles. Control logic is provided for direct memory access to system memory and for interrupts to the processor by each of the peripherals. Sound data corresponding to a sound waveform during a particular time period is fetched using DMA or interrupts. Registers store data for selecting the output rate of the sound data, the length of the sound waveform, and the volume of the sound waveform. Four audio channels and two separate audio ports are provide.
Abstract: A digital phase locked loop circuit for reading input data transmitted from storage media. Counter and adder components establish the time of arrival of input data bits. Inspection windows are established having durations and start/stop times that can be adjusted by correction signals so that subsequent data bits will be received in the middle of the inspection windows. Correction signals to the counter and adder components compensate for variations in the phase and frequency of input data transmitted from storage media.
Abstract: A video game home computer is implemented in NMOS (n type metal oxide semiconductor) technology with plural microprocessors. Centralized bus architecture and direct memory access (DMA) techniques are employed. A video display generator provides color signal outputs to drive a commercial television receiver display. This display generator receives inputs from both microprocessors and obtains data directly from memory. A bit map of display information is kept in memory, wherein bits of information in memory image the precise screen display for each instance in time. A bit map manipulator circuit performs, under microprocessor direction, logic function manipulation of the bit map data. Access between system components is accomplished via the bus architecture on a priority queue basis. Chip count and chip area is minimized.
July 19, 1985
Date of Patent:
October 11, 1988
Jay G. Miner, Joseph C. Decuir, Ronald H. Nicholson
Abstract: Menu item selection is performed in a personal computer system through the use of a mouse device which has means to allow the user to call up onto the display a header block which performs the function of the menu bar and to erase the header block from the screen when menu operations are not required. Multiple menu items can be selected during the same menu session by using a pair of mouse buttons to generate a sequence of selection commands which are utilized by unique system software to accumulate plural item selections without terminating the menu operation.