Abstract: A method and apparatus for logging errors in a storage device. As commands are executed by the storage device a list of previously executed commands is maintained. When an error is detected by the storage device, the previously executed commands and certain error condition codes are stored in an error log in a non-volatile memory of the storage device. The storage device is responsive to a command for reading back the values contained in the error log for diagnostic purposes.

Abstract: A system for seamless distributed job control between a multifunction peripheral and a host. A host, such as a personal computer, is linked with one or more multifunction peripherals. Each multifunction peripheral has at least scanning and printing capability. However, the peripherals do not require extensive memory or processing capability, because the processing and storage of data is accomplished by the host. A user potentially may operate the peripheral through a peripheral interface or through a user interface of the host.

Abstract: A processor-based system includes a processing unit. The processing unit includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. The processing unit is reset in response to a system reset signal being asserted at a reset input node and only selected portions of the processing unit are reset in response to a partial-reset signal being asserted at a partial-reset input node. The system can also include a number of other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.

Abstract: A memory system for performing error detection and correction including a memory device that stores a plurality of data words, where each data word has a plurality of data bits and at least one associated check bit. The memory system further includes memory control circuitry that reads a plurality of data words in multiple cycles to form a block word that includes a sufficient number of check bits to perform detection of double bit errors and correction of single bit errors. A 72-bit block word is formed by grouping smaller data words retrieved from the memory device. For a 9-bit device with eight data bits and one check bit, eight burst cycles may be used to retrieve a 72-bit data block. Similarly, for 18-bit devices, four burst cycles may be used to retrieve the data block and for 36-bit devices, two burst cycles may be used to retrieve the data block. The memory system further includes error logic that receives and performs error detection and correction upon the block word.