Patents Assigned to Compass Technology Company Limited
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Patent number: 11749595Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising at least four different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.Type: GrantFiled: May 10, 2021Date of Patent: September 5, 2023Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 11594509Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.Type: GrantFiled: February 1, 2021Date of Patent: February 28, 2023Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 11553598Abstract: An integrated electro-optical circuit board comprises a first flexible substrate having a top side and a bottom side, at least one first optical circuit on the bottom side of the first flexible substrate connected to the top surface through a filled via, at least one first metal trace on the top side of the first flexible substrate, an optical adhesive layer connecting the bottom side of the first flexible substrate to a top side of a second flexible substrate, and at least one second metal trace on a bottom side of the second flexible substrate connected by a filled via through the second flexible substrate, the optical adhesive layer, and the first flexible substrate to the at least one first metal trace.Type: GrantFiled: June 21, 2021Date of Patent: January 10, 2023Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung, Jason Rotanson
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Patent number: 11076491Abstract: An integrated electro-optical circuit board comprises a first flexible substrate having a top side and a bottom side, at least one first optical circuit on the bottom side of the first flexible substrate connected to the top surface through a filled via, at least one first metal trace on the top side of the first flexible substrate, an optical adhesive layer connecting the bottom side of the first flexible substrate to a top side of a second flexible substrate, and at least one second metal trace on a bottom side of the second flexible substrate connected by a filled via through the second flexible substrate, the optical adhesive layer, and the first flexible substrate to the at least one first metal trace.Type: GrantFiled: October 16, 2019Date of Patent: July 27, 2021Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung, Jason Rotanson
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Patent number: 11069606Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising at least four different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.Type: GrantFiled: October 2, 2019Date of Patent: July 20, 2021Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 10923449Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.Type: GrantFiled: October 11, 2018Date of Patent: February 16, 2021Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 10917973Abstract: A flexible printed circuit board with a lithium ion battery printed thereon is achieved. The flexible printed circuit board comprises a top and a bottom electrically insulating base film, a top electrically conductive metal layer over the top electrically insulating base film, and a bottom electrically conductive metal layer under the bottom electrically insulating base film. A printable lithium ion battery sits in a cavity completely through the top and bottom base films wherein a top of the battery contacts the top electrically conductive metal layer and wherein a bottom of the battery contacts the bottom electrically conductive metal layer. An adhesive film around the battery seals it to the top and bottom electrically insulating base film and seals the top electrically conductive metal layer to the bottom electrically conductive metal layer.Type: GrantFiled: February 26, 2020Date of Patent: February 9, 2021Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung, Jason Rotanson, Wing Lung Hon, Yam Chong, Wai Yin Wong, Shengbo Lu, Chenmin Liu
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Patent number: 10643942Abstract: A method to produce a substrate suitable for diffusion bonding is described. A flexible dielectric substrate is provided. An alkaline modification is applied to the dielectric substrate to form a polyamic acid (PAA) anchoring layer on a surface of the dielectric substrate. A Ni—P seed layer is electrolessly plated on the PAA layer. Copper traces are plated within a photoresist pattern on the Ni—P seed layer. A surface finishing layer is electrolytically plated on the copper traces. The photoresist pattern and Ni—P seed layer not covered by the copper traces are removed to complete the substrate suitable for diffusion bonding.Type: GrantFiled: September 19, 2019Date of Patent: May 5, 2020Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 10510653Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.Type: GrantFiled: August 23, 2018Date of Patent: December 17, 2019Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 10362680Abstract: A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left there between.Type: GrantFiled: May 14, 2018Date of Patent: July 23, 2019Assignee: Compass Technology Company, LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 10103095Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.Type: GrantFiled: October 6, 2016Date of Patent: October 16, 2018Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 9974188Abstract: A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left therebetween.Type: GrantFiled: April 5, 2016Date of Patent: May 15, 2018Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 9637376Abstract: An integrated circuit packaging structure comprises at least one Micro Electrical Mechanical Systems (MEMS) gyroscope die mounted directly on a multi-layer flexible substrate having at least one metal layer and wire-bonded to the flexible substrate and a lid or die coating protecting the MEMS die and wire bonds.Type: GrantFiled: April 20, 2016Date of Patent: May 2, 2017Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung
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Patent number: 9360318Abstract: An integrated circuit packaging structure comprises at least one Micro Electrical Mechanical Systems (MEMS) gyroscope die mounted directly on a multi-layer flexible substrate having at least one metal layer and wire-bonded to the flexible substrate and a lid or die coating protecting the MEMS die and wire bonds.Type: GrantFiled: December 23, 2014Date of Patent: June 7, 2016Assignee: Compass Technology Company LimitedInventors: Kelvin Po Leung Pun, Chee Wah Cheung