Patents Assigned to Computer Devices, Inc.
  • Patent number: 6311224
    Abstract: An apparatus is provided with operating logic for performing a number of data compression operations, and control logic for dynamically selecting one or more of the data compression operations, and have the selected data compression operation(s) performed on a set of data, in accordance with a set of scaling policies. In one embodiment the scaling policies are based, at least in part, on processor type and thread backlog. The scaling policies are used to determine compression techniques and combinations to use with data being communicated.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: October 30, 2001
    Assignee: Network Computing Devices, Inc.
    Inventor: Keith R. Packard
  • Patent number: 6006238
    Abstract: A server is provided with operating logic that dynamically migrates or shadows data it shares with its client, in accordance with a migration/shadowing policy that is based on one or more migration/shadowing heuristics. The server is also provided with operating logic that creates the shared data in accordance with a creation policy that is based on one or more creation heuristics. Furthermore, the server is provided with operating logic that maintains the migration/shadowing as well as the creation heuristics in accordance with an update policy. In one embodiment where the data are pixel maps, the migration/shadowing and creation heuristics are corresponding local usage counts, one per pixel map, and a global usage count respectively. The usage counts are incremented and decremented depending on the destinations of the pixel maps of interest.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: December 21, 1999
    Assignee: Network Computing Devices, Inc.
    Inventor: Keith R. Packard
  • Patent number: 5991836
    Abstract: An improved method and apparatus for providing multimedia communication between and client device and a server. The improved method and apparatus allows for communication of information, such as audio or video information from an application program to be communicated through a standard application program interface to a device driver which, in turn communicates the information over a network to a server.
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: November 23, 1999
    Assignee: Network Computing Devices, Inc.
    Inventor: Gregory L. Renda
  • Patent number: 5964842
    Abstract: An apparatus is provided with operating logic for performing a number of data compression operations, and control logic for dynamically selecting one or more of the data compression operations, and have the selected data compression operation(s) performed on a set of data, in accordance with a set of scaling policies. In one embodiment the scaling policies are based, at least in part, on processor type and thread backlog. The scaling policies are used to determine compression techniques and combinations to use with data being communicated.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: October 12, 1999
    Assignee: Network Computing Devices, Inc.
    Inventor: Keith R. Packard
  • Patent number: 5923341
    Abstract: The present invention is a method and apparatus for executing three-operand raster operation in two-operand raster environments. Structurally, the present invention includes a lookup table having one entry for each three-operand raster operation which is to be emulated. The entry associated with a particular three-operand raster operation includes a template and zero or more two-operand raster operations. Execution of the three-operand raster operation begins by retrieving the lookup table entry associated with the three-operand raster operation. Each two-operand raster operation in the lookup table entry is then executed in sequence. During execution, the template is used to provide a mapping which chooses which operands of the three-operand raster operation will be used as operands for the two-operand raster operation in the sequence.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: July 13, 1999
    Assignee: Network Computing Devices, Inc.
    Inventor: Kevin Martin
  • Patent number: 5894572
    Abstract: A method for rendering of three dimensional images on a video subsystem which does not include clearing of the Z buffer at each frame includes establishment of a Z buffer and a sequence number in memory, where the sequence number is incremented with each successive frame rendered and the Z buffer is cleared when the sequence number reaches a predetermined value; the Z buffer is thus recycled a number of times between clears. In a more elaborate implementation, the precision of the Z buffer is adjusted to permit clearing of the Z buffer to occur either as the result of the sequence number reaching a predetermined value or as the result of the accrual of a predetermined amount of time allocated for clearing, referred to as scheduling. The scheduling method can be applied to a wide range of accounting tasks within a system.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 13, 1999
    Assignee: Network Computing Devices, Inc.
    Inventor: Kevin Martin
  • Patent number: 5825373
    Abstract: The present invention is a method and apparatus for executing three-operand raster operation in two-operand raster environments. Structurally, the present invention includes a lookup table having one entry for each three-operand raster operation which is to be emulated. The entry associated with a particular three-operand raster operation includes a template and zero or more two-operand raster operations. Execution of the three-operand raster operation begins by retrieving the lookup table entry associated with the three-operand raster operation. Each two-operand raster operation in the lookup table entry is then executed in sequence. During execution, the template is used to provide a mapping which chooses which operands of the three-operand raster operation will be used as operands for the two-operand raster operation in the sequence.
    Type: Grant
    Filed: October 11, 1996
    Date of Patent: October 20, 1998
    Assignee: Network Computing Devices, Inc.
    Inventor: Kevin Martin
  • Patent number: 5499328
    Abstract: A line-draw method and apparatus that draws lines at fast speeds. Lines are drawn a pixel at a time and a number of algorithms are employed to determine the pixels to be drawn. The line-draw method determined is a function of line length, typical length categories are short, medium and long. For short lines, a table look-up method is employed. For longer length lines, a multi-pixel segment method (burst method) is employed. Burst methods are line-draw methods which draw lines using a plurality of multi-pixel segments to draw the lines where each segment is characterized as having a number (U) of unconditional pixels which are always drawn and an actual number (A) of conditional pixels which are drawn. The actual number (A) is any number up to a maximum number (C) of conditional pixels which can be drawn.
    Type: Grant
    Filed: February 22, 1991
    Date of Patent: March 12, 1996
    Assignee: Network Computing Devices, Inc.
    Inventor: Kevin B. Martin
  • Patent number: 5493637
    Abstract: A method for rendering of three dimensional images on a video subsystem which does not include clearing of the Z buffer at each frame includes establishment of a Z buffer and a sequence number in memory, where the sequence number is incremented with each successive frame rendered and the Z buffer is cleared when the sequence number reaches a predetermined value; the Z buffer is thus recycled a number of times between clears. In a more elaborate implementation, the precision of the Z buffer is adjusted to permit clearing of the Z buffer to occur either as the result of the sequence number reaching a predetermined value or as the result of the accrual of a predetermined amount of time allocated for clearing, referred to as scheduling. The scheduling method can be applied to a wide range of accounting tasks within a system.
    Type: Grant
    Filed: December 4, 1992
    Date of Patent: February 20, 1996
    Assignee: Network Computing Devices, Inc.
    Inventor: Kevin Martin
  • Patent number: 5487051
    Abstract: An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a "raster operation". Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: January 23, 1996
    Assignee: Network Computing Devices, Inc.
    Inventors: John R. Providenza, Lee Boekelheide
  • Patent number: 5347631
    Abstract: The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: September 13, 1994
    Assignee: Network Computing Devices, Inc.
    Inventors: John R. Providenza, Lee Boekelheide
  • Patent number: 5345555
    Abstract: An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a "raster operation". Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.
    Type: Grant
    Filed: June 14, 1993
    Date of Patent: September 6, 1994
    Assignee: Network Computing Devices, Inc.
    Inventors: John R. Providenza, Lee Boekelheide
  • Patent number: 5313576
    Abstract: The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.
    Type: Grant
    Filed: November 23, 1990
    Date of Patent: May 17, 1994
    Assignee: Network Computing Devices, Inc.
    Inventors: John R. Providenza, Lee Boekelheide
  • Patent number: 4857990
    Abstract: A simple, efficient technique for encoding NTSC video signals features sampling the signal at 8/3 the subcarrier frequency, generating no more than 256K samples for a full 525 line frame, generating as many samples per horizontal scan line as there are columns in a memory where the frame is to be stored, incrementing a row address counter for the memory once for each new horizontal scan line, and providing an analog reproduction of the color burst signal directly from and based solely on the digital samples of the color burst signal.
    Type: Grant
    Filed: June 1, 1988
    Date of Patent: August 15, 1989
    Assignee: Computer Devices, Inc.
    Inventor: Thomas B. Horgan
  • Patent number: 4608663
    Abstract: A non-random network can connect a common peripheral device to one of a plurality of computers. Each of these computers has a request line for providing a request signal. The network has a plurality of switching devices, each coupled to the common peripheral device and to a corresponding one of the computers. Each of these switching devices is operable in response to a select signal being applied thereto to transfer data between its corresponding one of the computers and the common peripheral device. The network also has a scanner coupled to the plurality of switching devices for operating them in a predetermined order by sequentially applying to them the select signal. This scanner is operable to cease sequencing and to continue applying the select signal to said switching devices to switch a selected one of the computers in response to a persistence of the request signal from the selected one of the computers.
    Type: Grant
    Filed: August 31, 1983
    Date of Patent: August 26, 1986
    Assignee: Wolsten's Computer Devices, Inc.
    Inventor: William E. Gordon
  • Patent number: 4051415
    Abstract: A motor control system for use in maintaining substantially constant linear speed of a web moving between a supply and a takeup reel such as in a reel driven magnetic tape transport. The rotational periods of the reels are measured to provide representative signals which are summed and compared with a reference to yield an error signal for control of takeup reel motor driving voltage such that the error voltage tends to become zero, resulting in substantially constant linear web speed. In alternative embodiment, the period representative signals are each non-linearly processed prior to summing to enhance the accuracy of web speed control. In further embodiment, the rotational frequencies of the web reels are measured to provide representative signals which are each non-linearly processed and then summed and from which summed signal is derived a resulting error voltage for web speed control.
    Type: Grant
    Filed: March 5, 1975
    Date of Patent: September 27, 1977
    Assignee: Braemar Computer Devices, Inc.
    Inventor: Peter G. Martin
  • Patent number: 4008488
    Abstract: For use with a magnetic data recording having one or more data tracks and a clock track, a decoding system for providing strobe pulses derived from the clock track in intended phase relationship with the decoded data. A measure of the clock pulse period is continuously derived from the clock track and processed in association with information derived from the data track to produce the intended strobe pulses.
    Type: Grant
    Filed: August 25, 1975
    Date of Patent: February 15, 1977
    Assignee: Braemar Computer Devices, Inc.
    Inventor: George T. Osborne