Abstract: A data encapsulation system and related methods. Implementations may include: forming at least one frame having a data payload, a data sequence, and one or more control bytes; evaluating data to be stored in the data payload and setting a value of the one or more control bytes, where the value of the one or more control bytes may be equal to: a first control byte value where one or more values of the data correspond with the first control byte value; a second control byte value indicating a size of the data; or a third control byte value where one or more values of the data continue beyond the frame. The value of each one of the one or more control bytes for each of the at least one frames may be equal to either the first, second, or third control byte values.

Abstract: A method for generating a packet sequence for determining a Packet Error Rate (PER) using network packets, the method comprising generating, using a Local Area Network (LAN) enabled computer, a series of network PER test packets and frames, each packet comprising a predetermined unique identifier and each frame comprising a predetermined sequence for the packets in the series of network packets, wherein the series of network packets and frames are each of a size that is compliant with a predetermined framing mode and encapsulation protocol for the transmission system for determining a PER from the series of network packets and frames, and transmitting, using a transmitting device, the network packets and frames to a receiving device.

Abstract: An adaptive equalizer. Implementations of adaptive equalizers may include implementations of 8-QAM adaptive equalizers that may include a signal filter, an adaptive processor coupled to the signal filter and a slicer coupled to the signal filter and the adaptive processor. The slicer may be configured to utilize a plurality of desired signals corresponding to an 8-QAM signal constellation having four quadrants, four levels disposed along the I-axis, and three levels disposed along the Q-axis. The slicer may also be configured to output an error signal by receiving an equalized output signal, processing the equalized output signal by correlating the equalized output signal with a decision region within one of the four quadrants, selecting one of a plurality of desired signals corresponding to the decision region, and calculating the error signal using the desired signal and the equalized output signal.

Abstract: A burst demodulator. Implementations may include a first frequency estimating module adapted to remove a first frequency offset from a plurality of data samples. A second frequency estimating module may be coupled with the first frequency estimating module and may be adapted to remove a second frequency offset from the plurality of data samples. A third frequency estimating module may be coupled with the second frequency estimating module and may be adapted to remove a third frequency offset from the plurality of data samples. A clock phase estimating module may be coupled with the third frequency estimating module and may be adapted to calculate a clock phase offset value, select one or more coefficients for a finite impulse response (FIR) filter, and process the plurality of data samples with the FIR filter. A data processing module may be adapted to recover the data included in the plurality of data samples.

Abstract: A system for generating a frequency reference signal comprising an oscillator, a direct digital synthesizer coupled to the oscillator and configured to receive a signal output from the oscillator, a digital to analog converter coupled to the direct digital synthesizer and configured to receive a sampled signal from the direct digital synthesizer and to convert the sampled signal to an analog waveform, and a bandpass filter coupled to the digital to analog converter and configured to select an aliased output signal from the digital to analog converter at a Nyquist zone other than a first Nyquist zone and to output the frequency reference signal.

Abstract: A redundancy system for a co-channel telecommunication system and related methods. Implementations of the redundancy system may include at least a first modulator and a second modulator having a symbol mapper coupled to a parallel bit signal. The symbol mapper may be configured to route each of a plurality of parallel bits received through the parallel bit signal to a plurality of significant bit signals. In a first implementation, a plurality of significant bit signal multiplexers may be used to switch the plurality of parallel bit signals to allow the first and second modulators to operate in either a redundant or operating mode. In a second implementation, a premapped symbol (PMSI) encoder and a PMSI decoder may be used to transmit the plurality of significant bit signals across an interface bus as a real dual-data rate (DDR) signal and an imaginary DDR signal.

Abstract: A method of transmitting telecommunications data comprising modulating first and second data signals, selecting transmit powers first and second terminals to achieve a predetermined power equivalent bandwidth (PEB) through an un-attenuated, transmitting the first data signal to the second terminal and the second data signal to the first terminal through a remote receiver, measuring a total received signal-to-noise ratio of the first and second data signals and a total received signal-to-noise ratio received at the second and first terminals, respectively, measuring a signal-power density ratio between the first and second signals, determining a ratio of excess uplink to downlink losses based a rain model parameter and operating frequency, calculating excess uplink and downlink losses relative an optimized, un-attenuated telecommunications channel, and changing a transmit power of a terminal such that the predetermined PEB is maintained when at least one of the signals experiences attenuation.

Abstract: A burst demodulator and method of obtaining a signal of interest from many signals of interest within a composite signal. Implementations may include receiving a composite signal, centering a replica of the interfering signal relative to the composite signal, reducing the composite signal to the bandwidth of a desired signal of interest, and canceling the remaining portion of the interfering signal.

Abstract: A system for removing interference comprising a receive decimation filter that accepts a composite received baseband signal and generates filtered sampled data at a decimation rate, a transmit decimation filter that accepts a digitally converted replica of an interfering signal and generates filtered sampled data at a decimation rate, an integer sample delay control (ISDC) that provides multiple sample delay control for the replica and stores an estimated delay value, an adaptive filter that provides fractional sample delay control for the replica of the interfering signal and optimizes cancellation of the interfering signal, a digital phase-locked loop (DPLL) programmed with a known frequency offset of the interfering signal that tracks a phase and frequency of the replica of the interfering signal, an automatic gain control (AGC) that maintains near full scale operation of adaptive filtering and the DPLL, and a slicer, mixer, and delay unit forming an error estimator.

Abstract: Implementations of broadband satellite systems may comprise systems implementing embodiments of one, two or all of the aspects of distributed leadership, distributed bandwidth allocation and distributed timing. In systems implementing distributed leadership aspects, the control and administration of the network can be effectively performed by any site. In systems implementing distributed bandwidth allocation aspects, all remote sites may act in concert by running the same algorithm on the information they have received, arriving at a harmonious conclusion. In systems implementing distributed timing aspects, time division multiple access (“TMDA”) bursts within timeslots may not require a central timing reference, a distributed high stability timing reference or a timing leader.

Abstract: A system for generating a frequency reference signal comprising an oscillator, a direct digital synthesizer coupled to the oscillator and configured to receive a signal output from the oscillator, a digital to analog converter coupled to the direct digital synthesizer and configured to receive a sampled signal from the direct digital synthesizer and to convert the sampled signal to an analog waveform, and a bandpass filter coupled to the digital to analog converter and configured to select an aliased output signal from the digital to analog converter at a Nyquist zone other than a first Nyquist zone and to output the frequency reference signal.

Abstract: Time delay and frequency offset calculation systems and related methods. System implementations include modules coupled together configured to calculate a time delay and a corresponding frequency offset of a second signal delayed in time relative to a first signal with the maximum value of a magnitude of a delay optimization function. Implementations of a method for calculating a time delay and frequency offset calculate the maximum value of the delay optimization function by generating the cross-correlation of one or more adjacent discrete Fourier transformed blocks corresponding to the first signal and second signal, respectively, of two or more discrete Fourier transformed blocks. The maximum value of the delay optimization function is then identified. Implementations of the method may compare the identified maximum value of the magnitude of the delay optimization function with a threshold to determine whether to continue processing for additional adjacent discrete Fourier transformed blocks.

Abstract: A method for encryption and decryption synchronization for a communications channel comprising encrypting a communications channel using a data encryption device, the communications channel comprising a data stream having unique information native to the data stream, transmitting the encrypted data stream using a transmitter without applying an additional framing structure or a multiplexing signaling message after the data stream is encrypted such that the encrypted data stream does not require additional bandwidth to support cryptographic synchronization, receiving by a receiver comprising a decryption device, the transmitted encrypted data stream, and identifying the unique information within the transmitted data stream by iteratively decrypting the encrypted data stream using a processor until a cryptographic parameter is found that results in cryptographic synchronization between the encryption and decryption devices based on a priori knowledge of the unique information within the transmitted data stream.

Abstract: One or more frame slots to each transceiver are allocated for communication within each message cycle. The number of frame slots allocated can be dynamically adjusted to accommodate variable traffic loads per transceiver, and an offset of the frame slots within the message cycle is preferably predefined to provide a uniform distribution among the transceivers. The design of the transceiver is independent of the particular application, having at least one programmable parameter that controls the number of frame slots allocated within the message cycle. By controlling the number of frame slots allocated to a transceiver, the amount of inactive time, and hence battery life, can be controlled. When a conflict occurs among multiple transceivers having pending messages at the same frame slot, the allocation of the frame slot to a transceiver is based at least in part on the resultant lag time to each transceiver.

Abstract: Existing message fields and/or message parameters are configured to facilitate the packet and message synchronization and decoding tasks that conventionally rely upon a known bit sequence in each packet, thereby eliminating the need for a predefined message preamble in each packet. In example embodiments, the unique identifier of each transmitter is structured to facilitate determination of bit polarity and the start of each packet; packet sequence numbers use an unconventional counting sequence to assure synchronizing bit transitions; and so on. Other techniques, such as the use of run-length limited (RLL) message encoding, or 8b/10b encoding, to assure within-packet bit transitions, are also used to enhance clock synchronization and proper header location determination.

Abstract: A method of embedding and transmitting a meta-data message in an original burst carrier signal for message reassembly comprising spreading a meta-carrier signal using a Direct Sequence Spread Spectrum (DSSS) spreading code having a Pseudo-Random Noise (PRN) spreading code sequence, the meta-carrier signal comprising one or more bits of meta-data information about the original burst carrier signal, lowering a power spectral density of the meta-carrier signal using the PRN spreading code such that interference with the original signal is reduced, combining the original burst carrier and the meta-carrier signals using a modulator such that a composite burst carrier signal results wherein the meta-carrier signal occupies at least a portion of a bandwidth of the original carrier, and transmitting the composite burst carrier using a transmitter over a telecommunications channel in which only one burst carrier signal is expected to be present within a predetermined frequency bandwidth at a point in time.

Abstract: A method of controlling bandwidth allocation over a communications link comprising detecting, by a processor, a change in a power level of a composite signal transmitted by a transmitter, the composite signal comprising a plurality of carrier signals and having a constant center frequency and spectral allocation, adjusting at least one of a modulation factor and a forward error correction (FEC) rate of one or more of the plurality of carrier signals using a modulator, in response to the change in power level to maintain a predetermined data rate and spectral allocation of the composite signal, and maintaining, by the modulator, an uninterrupted communications link between the transmitter and a remote receiver while the at least one of the modulation factor and the FEC rate is adjusted.

Abstract: A burst processing modem and related methods. Implementations of a first method of demodulating bursts from a plurality of channels may include receiving a plurality of channels from a received beam and separating the plurality of channels and storing a plurality of frames in a random access memory (RAM) array with a channelizer where each frame of the plurality of frames includes one or more bursts. The method may include serially reading, using a demodulator in response to receiving a timing signal, a desired burst from a frame stored in the RAM array wherein a burst time plan identifying the desired burst is used by a receive frame state machine to generate the timing signal. The method may include demodulating and decoding the desired burst using a demodulator and a decoder to produce a quantity of packet data, and sending the quantity of packet data to a specified destination.

Abstract: A communication method for embedding a meta-carrier under an original carrier signal with reduced or minimal original carrier signal degradation, the method comprising transmitting an original carrier signal by a transmitter, forming a meta-carrier signal separate from the original carrier signal that contains meta-data about the original carrier signal including one or more characteristics of the original carrier signal configured for use by a receiving device to establish one or more parameters of a receiving device to receive the original carrier signal at the receiving device, and transmitting the meta-carrier signal by the transmitter separate from the original carrier signal such that the meta-carrier signal occupies at least a portion of a bandwidth of the original carrier signal.

Abstract: The system and method disclosed herein provide for closed-loop compensation of significant amplitude versus frequency group delay distortion that may be introduced into a satellite communication system signal by the uplink equipment and a satellite repeater equipment. One or more equalizers can be configured to automatically assess distortion at the downlink receiver, automatically calculate the necessary pre-distortion coefficients and provide them to a modulator that pre-distorts the uplink signal to thereby cancel the distortion.