Abstract: A method and system to minimize the potential of jitter buffer underflow/overflow resulting from a difference in sampling rates of an audio encoder and an audio decoder are disclosed herein. The difference in sampling rates, or clock skew, can be determined from a difference between an actual amount of data stored in a jitter buffer and the desired, or threshold, amount. A subset of packets from a sequence of packets output to the audio decoder can be altered to compensate for the clock skew, whereby the amount of data associated with the subset of packets is decreased when the sampling rate of the encoder is greater than the sampling rate of the decoder, and the amount of data is increased when the sampling rate of the encoder is less than the sampling rate of the decoder. The present invention finds particular advantage in providing audio data via a packet-switched network.

Abstract: A wireless transceiver including multiple antennas, an antenna switch, and a media access controller that controls the antenna switch for determining when to switch to another antenna based on packet error rate (PER). Instead of switching the antenna on a packet-by-packet basis, antenna selection is made after one or more packets errors have been detected. The CRC is used to identify receive packet errors. A timer is used to determine each transmit packet error when an acknowledge packet is not received in time. A method of selecting from among multiple antennas including counting packet errors, comparing a packet error count with a threshold value to determine a threshold condition, switching to a different antenna if the threshold condition is met, and resetting the packet error count when the threshold condition is met.

Abstract: Disclosed herein are exemplary techniques for the communication of information in a wireless system by using multiple wireless channels. A direct link between two or more wireless devices may be established by performing a direct link setup between two or more wireless devices using an access point, where the direct link setup is conducted over a base channel and the direct link is established on a parallel channel. The two or more wireless devices may switch to the parallel channel and use the established direct link to communicate information directly without the access point as an intermediary. In anticipation of a predetermined event, such as the transmission of a delivery traffic indication map (DTIM) beacon frame by the access point, the two or more wireless devices may switch back to the base channel so that uplink, downlink and/or peer-to-peer information may be transmitted and/or received.

Abstract: Systems and methods for performing bit loading in a dual latency data transmission system. In a computer network, such as an XDSL-based network, carrier channels are allocated between two latency paths. Error sensitive information is transmitted over a latency path employing one or more forward error correction techniques. Latency sensitive information that is relatively more tolerant of errors is transmitted over the other latency path. Rather than employing the lowest coding gain for carrier channels having the two different latency paths, the highest coding gain for each path is used by applying different target S-N-R margins for carrier channels having different latency paths.

Abstract: The present invention provides a system and method for implementing a new TEQ training approach that trains TEQ coefficients by exploiting both time-domain and frequency-domain information. An advantage of this technique is that it reduces memory usage due to the training process. In addition, the complexity of the training process is simplified, and the associated computational work is reduced. The reduction of memory usage and computational work in turn may lead to cost savings, power consumption savings and other advantages.

Abstract: A wireless transceiver including an oscillator, a radio, a baseband processor and MAC device that performs apiori frequency offset correction. The radio converts between RF signals and baseband signals. The baseband processor includes a frequency correction loop, an inverter and a combiner. The frequency correction loop generates a frequency offset signal based on a frequency difference between an oscillator reference frequency and frequency of a received signal. The inverter inverts the frequency offset signal and the combiner adjusts frequency of a transmit signal by the inverted frequency offset signal. The MAC processes received packets, identifies packets received from an AP, provides packets to the baseband processor for transmission, and controls the baseband processor to adjust transmit signals to a frequency of the AP. The baseband processor may include a memory or filter to store or update frequency offset values.

Abstract: One embodiment of a method for switching ATM cells using Early Packet Discard and Partial Packet Discard is provided. Initially, a first cell of an AAL5 packet is received at an input port. Next, it is determined whether there is likely to be enough buffering available to handle the whole packet (i.e., up to 64 Kbytes). If it is determined that sufficient buffering is unlikely to be available, the entire packet is discarded. If it is determined that sufficient buffering exists, the cell is received and buffered for subsequent transmission. Next it is determined whether the flow's buffer is filled at any time after initial transmission of a AAL5 cell but before reception of the final cell. If such a state is determined, the current cell is discarded and a flag is set in the flow structure so that subsequent cells of the same packet, except the last, will also be discarded.

Abstract: A system and method for formatting and transmitting DMT symbols. For each symbol to be transmitted, the last Lcp samples of the symbol are prepended to the symbol as a cyclic prefix. Next, of the samples contained within the cyclic prefix, the first Î2 samples are appended to the symbol as a cyclic suffix. By providing the above described cyclic prefix and suffix, sharp PSD transitions are provided in the first overlapped RFI band (1.8–2 MHz) and out of band PSD. Upon formatting, each symbol is transmitted so that its transmission overlaps the prior symbol by Î2 samples. This results in the output signal being shaped by a raised cosine function for the duration of the Î2 overlap.

Abstract: A method of canceling gain and phase imbalance including estimating a cancellation parameter based on the signal divided by its complex conjugate, calculating a correction value for the signal using the cancellation parameter, and correcting the signal by subtracting the correction value from the signal. Estimate the cancellation parameter may include performing a stochastic gradient algorithm or a least squares estimate. A cancellation system including a conjugate conversion unit, an estimator, a combiner, a converter, and a subtractor. The estimator estimates a cancellation parameter and the combiner combines the cancellation parameter and the complex conjugate signal to provide a cancellation signal. The converter converts the cancellation signal to a correction signal, and the subtractor subtracts the correction signal from the imbalanced signal to provide a corrected signal. The combiner may be an adaptable tap of a digital signal processing circuit.

Abstract: A Baseband transmitter for a radio frequency (RF) communication device according to an embodiment of the present invention includes a single-carrier processor, a pulse shape filter, a multi-carrier processor and a signal combiner. The single-carrier processor generates a single-carrier signal at a first sample rate. The pulse shape filter includes multiple polyphase filters which filter the single-carrier signal according to a time shaping pulse that approximates a multi-carrier power spectrum and a sample switch that selects outputs of the polyphase filters at a second sample rate. The multi-carrier processor generates a multi-carrier signal at the second sample rate. The signal combiner combines the filtered single-carrier signal with the multi-carrier signal while maintaining phase, gain, frequency and timing alignment.

Abstract: A tool for providing a site survey of a wireless network. In one embodiment the tool includes a network server, a plurality of access points and a mobile client. The network server is used to create and distribute data packets. The plurality of access points are coupled to send and receive data packets from the server. The mobile client is in wireless communication with the plurality of access points. The client has a two-dimensional surface area map on a data grid. The client includes instruction to compute throughput and packet error rate at selected locations within a network coverage area when the client receives data packets sent by the network server. The client displays the throughput and packet error rate on the two-dimensional surface area map to provide a site survey of the wireless network coverage.

Abstract: A Baseband receiver including a CIR estimate block, gain, phase and timing loops, a CMF, a single-carrier processor and a multi-carrier processor. The CIR estimate block generates an impulse response signal based on a receive signal that is a single-carrier signal or a single-carrier segment of a mixed carrier signal. The single-carrier segment has a spectrum that approximates a multi-carrier spectrum. The gain, phase and timing loops adjust gain, phase, frequency and timing to provide an adjusted receive signal. The CMF filters the adjusted receive signal according to the impulse response signal. The single-carrier processor processes the adjusted and filtered receive signal to resolve a single-carrier segment of a mixed carrier signal. The single-carrier processor detects a mixed carrier mode indication in a single-carrier segment and asserts a start indication. The multi-carrier processor processes a multi-carrier segment of a mixed carrier signal in response to assertion of the start indication.

Abstract: A system and method for ATM header compression for DSL links is provided. One embodiment, among others, for compressing ATM headers for communication across an ATM network involves transmitting an initial full ATM header to a receiver in the ATM network. Thereafter, when data payloads are available for transmission, the ATM header that corresponds to the data payload is compressed by either a differential technique, dictionary technique, or a multi-cell technique. The compressed ATM header and the data payload are then communicated over the ATM network to the receiver, wherein the receiver is enabled to interpret the compressed ATM header accordingly. By compressing the ATM header, a greater number of ATM cells may be communicated in the ATM network than if the ATM header were communicated in an uncompressed format.

Abstract: A communications system may be characterized by a system error variance because the error variance provides an indication of signal corruption in the system. By strategically adding a secondary sensor to the communications system, system characteristics may be altered so that the system error variance is reduced. A system and method are presented, wherein a secondary sensor is configured to receive a disturbance effect and produce a filtered slave signal as a function of the disturbance effect. The filtered slave signal is configured to alter the characteristics of the communications system and thereby reduce system error variance.

Abstract: A method and system for reducing the power to average ratio (PAR) at the transmitter after the up sampling and interpolation filter. In the time domain, Side Tone Packets Injection (STPI) system and method detects the optimal peaks that will result in having a low PAR at a sampling rate of T/K and combines an optimal binary and a PAR-lowering sequence and an upsampled, interpolated original discrete time signal at the scale of one extended symbol for multi-carrier modulation and at the scale M of symbols for single-carrier modulation. STPI does not require peaks search and processing at the scale of many time samples, does not require iterative Fast Fourier Transform (FFT) and Inverse Fast Fourier Transform (IFFT) processing thus, allowing the receiver not to perform extra demodulation.

Abstract: The present invention provides a system and method for reducing power consumption by shaping the spectrum of a downstream signal. Incremental improvements in power consumption due to spectral shaping produces a noticeable reduction in the aggregate power consumed at a central office in asymmetric digital subscriber line (ADSL) systems.

Abstract: Disclosed herein are various mechanisms for the adaptive cancellation of radio frequency interference (RFI) in Discrete Multitone (DMT)-based signal transmissions systems. various mechanisms for the adaptive cancellation of radio frequency interference (RFI) in Discrete Multitone (DMT) modulated signal transmissions systems. In at least one embodiment of the present invention, RFI introduced by one or more RFI disturbers (e.g., ham radios) into a DMT modulated signal may be detected by calculating an RFI canceller coefficient for some or all of the DMT bins of the signal, where the RFI canceller coefficient represents the correlation between the noise at the corrupted bin and the reference RFI noise. The RFI canceller coefficients for the corrupted bins may be calculated using an LMS adaptation process. Those bins where the magnitude of the corresponding RFI canceller coefficient is greater than a certain threshold may be marked as corrupted by RFI.

Abstract: A method and system is provided for interleaving multiple cycles streams from clients seeking SDRAM access. More particularly, a master scoreboard register is established for enabling the interleaving of many clients SDRAM access requests into a single stream optimized for maximum packing density of the different streams, thereby reducing the overhead associated with each individual stream. In one embodiment, at least one Master Score Board Register (MSBR) is provided for storing the order of cycles to go out of a controller/processor and to the SDRAM. If there is a set bit in a particular location in the MSBR then it means that the cycle is occupied and already allocated and cannot be used for anything else. If the bit is not set then the cycle that bit represents a vacant slot is ready for use by a client. Upon receipt of an SDRAM request, an interleaving engine identifies the bit locations in the MSBR associated with the requested cycles.

Abstract: The present invention provides methods and systems for providing efficient use of available CPU cycles that may be achieved by reducing the length of the echo canceller filter. An echo canceller's adaptive algorithm may be implemented to reach a lower mean squared error due to the increased training time allowed by cycle reduction. Total power consumption of a processor may be reduced by reducing the number of multiplications (and/or other operations) that may be performed by an echo canceller filter for each time iteration. This may be achieved by not performing multiplications on taps that are not being used. For higher rates, a shorter echo canceller filter may be implemented by transmitting less energy in low frequencies. As a result, the temporal length of the echo channel may be shortened thereby reducing the total number of taps needed to model the channel. The present invention may further enhance performance by reducing CPU cycles and allowing for more echo canceller training time.

Abstract: A system and method is presented for enciphering information using the Advanced Encryption Standard (AES) algorithm in which a subprocessor is configured to manipulate data as it is being loaded into the subprocessor memory. Thus, unlike implementations in the prior art, which require complete loading of data into a subsystem memory before data manipulation thereby creating a potential bottleneck in memory, this invention reduces the potential bottleneck in memory.