Abstract: A selective audio source enhancement system includes a processor and a memory, and a pre-processing unit configured to receive audio data including a target audio signal, and to perform sub-band domain decomposition of the audio data to generate buffered outputs. In addition, the system includes a target source detection unit configured to receive the buffered outputs, and to generate a target presence probability corresponding to the target audio signal, as well as a spatial filter estimation unit configured to receive the target presence probability, and to transform frames buffered in each sub-band into a higher resolution frequency-domain. The system also includes a spectral filtering unit configured to retrieve a multichannel image of the target audio signal and noise signals associated with the target audio signal, and an audio synthesis unit configured to extract an enhanced mono signal corresponding to the target audio signal from the multichannel image.

Abstract: A system for controlling distortion comprising a total harmonic distortion (THD) modeling system configured to apply a chirp signal to a system and to identify one or more frequency bands at which distortion is present, and to apply a ramping signal to identify for each of the one or more frequency bands an input signal level at which distortion is initiated. A signal processing system configured to receive an input signal, to determine whether frequency components are present in the input signal that are associated with the one or more frequency bands at which distortion is present, and to limit the amplitude of the input signal at the one or more frequency bands, such as by applying dynamic range compensation.

Abstract: Encrypted storage often introduces unwanted latency in access. This delay can result in a processor having to wait for critical data thus slowing performance. Generally speaking, the latency is at most an issue when reading from encrypted storage, since the processor may need the information read from encrypted storage to proceed. During a write operation, there typically is not an issue because the processor does not need to wait for the end of the write operation to proceed. A variant of counter (CTR) mode for a block cipher can be used to perform the majority of the decryption operation without knowledge of the ciphertext, therefore the majority of the decryption operation can be performed concurrently with the retrieval of the ciphertext from memory. In order to further secure the encrypted storage, a light encryption can be performed to further obfuscate the ciphertext.

Abstract: A system for audio processing comprising a room reflection emulation system for emulating sound reflections in a room. A room acoustics emulation system for emulating acoustic properties of the room. A head, shoulder and ear emulation system for emulation sound reflections near the head.

Abstract: A system for processing audio data comprising a linear demixing system configured to receive a plurality of sub-band audio channels and to generate an audio output and a noise output. A spatial likelihood system coupled to the linear demixing system, the spatial likelihood system configured to receive the audio output and the noise output and to generate a spatial likelihood function. A sequential Gaussian mixture model system coupled to the spatial likelihood system, the sequential Gaussian mixture model system configured to generate a plurality of model parameters. A Bayesian probability estimator system configured to receive the plurality of model parameters and a speech/noise presence probability and to generate a noise power spectral density and spectral gains. A spectral filtering system configured to receive the spectral gains and to apply the spectral gains to noisy input mixtures.

Abstract: A grounding switch is described which operates properly even in the presence of negative voltages on a signal line. The grounding switch uses isolated field effect transistors that have their substrates tied to different voltages. The isolated field effect transistor has a gate voltage and substrate voltage which can be pulled down to a negative voltage when the signal line has a negative voltage allowing the switch to remain open even with a negative voltage.

Abstract: An audio driver with reduced rub and buzz distortion that includes a digital processing module. A digital to audio converter (DAC) operable to receive a digital audio signal supplied by the digital processing module. One or more analog driver stages operable to receive an analog audio signal supplied by the DAC. A peak amplitude compressor.

Abstract: A driver controller comprising a state machine for controlling transitions between a plurality of states. An output switch for providing a low impedance path to ground during transition periods. An output stage for decoupling output signal from driver amplifier during the transition periods.

Abstract: A system for detecting motion comprising a first speaker, a first microphone separated from the first speaker by a distance D1, a sound generator, an echo parameter measurement device and an echo parameter monitor, wherein the echo parameter monitor stores two or more sequential echo parameters and generates a motion indicator if the two or more sequential echo parameters indicate a change in an acoustic echo path that exceeds a predetermined threshold.

Abstract: Traditionally, echo cancellation has employed linear adaptive filters to cancel echoes in a two way communication system. The rate of adaptation is often dynamic and varies over time. Disclosed are novel rates of adaptation that perform well in the presence of background noise, during double talk and with echo path changes. Additionally, the echo or residual echo can further be suppressed with non-linear processing performed using joint frequency-time domain processing.

Abstract: A database system comprising a plurality of access keys stored in a first data memory device sector, each access key associated with a node value stored in a second data memory device sector. An access key processor configured to receive an input value and return the associated node value for the input value if the input value matches an access key stored in the first data memory device sector. The access key processor is configured to generate a revised input value if the input value does not match an access key stored in the first data memory device; a default node value stored in the second data memory device sector and associated with a portion of the input value, wherein the access key processor is configured to return the default node value as part of the revised input value.

Abstract: A method for continuously estimating reverberation decay comprising receiving a sequence of audio data samples. Determining whether a plateau is present in the sequence of audio data samples. Generating one or more reverberation parameters from the sequence of audio data samples if it is determined that the plateau is present.

Abstract: A circuit for generating a signal comprising a first transistor having a drain, a gate and a source. A second transistor having a drain, a source and a gate coupled to the gate of the first transistor to form a current mirror. A current source coupled to the source of the first transistor. A diode-connected transistor having a drain coupled to the source of the second transistor, a source and a gate that forms an output. A variable resistor having a first terminal coupled to the source of diode-connected transistor and a second terminal. A capacitor coupled to the second terminal of the variable resistor.

Abstract: A system for detecting a jack configuration comprising a first plurality of switches configured to couple a first headphone jack position to ground. A second plurality of switches configured to couple a second headphone jack position to ground. A microphone bias circuit for applying a microphone bias signal to the second headphone jack position when the first headphone jack position is coupled to ground, and for applying the microphone bias signal to the first headphone jack position when the second headphone jack position is coupled to ground.

Abstract: A method for signal processing, receiving a time domain signal having a sample-rate Fs and generating N time domain signal bands, each having a bandwidth equal to Fs/N. Receiving the N signal bands and transforming a first time domain signal band to a frequency domain at a first resolution and a second time domain signal band to the frequency domain at a second resolution, where the first resolution may be different from the second resolution. Determining one or more first filter coefficients using the frequency domain components from the first signal band and one or more second filter coefficients using the frequency domain components from the second signal band. Transforming the first and second filter coefficients from the frequency domain to a time domain. Applying the first and second time domain filter coefficients to the first and second time domain signals, respectively.

Abstract: A circuit comprising a peak detector configured to receive a positive voltage input, a negative voltage input and a reference current source input and to output a peak signal data value. A fast attack current source control coupled to the peak detector and configured to generate a current source control signal as a function of the peak signal data value. A slow decay control coupled to the fast attack current source control and configured to reduce the current source control signal based on a predetermined or user-selected decay rate. A variable current source coupled to the fast attack current source control and configured to generate a variable current as a function of the current source control signal. Amplifier circuitry coupled to the variable current source, the amplifier circuitry configured to receive the variable current.

Abstract: A level shifter comprising a first driver transistor for receiving an input signal. A gate-controlled transistor coupled to the first driver transistor. A second driver transistor coupled to the gate controlled transistor. An output coupled to the second driver transistor, wherein the gate-controlled transistor is for receiving a predetermined gate voltage when the output voltage exceeds a predetermined value.

Abstract: There is provided a method of establishing voice communications over a packet network using a first computer having a first VoIP application, a first modem, a first modem audio subsystem, a microphone and a speaker. The method comprises establishing a VoIP connection with a second VoIP application using the first VoIP application; making a phone connection over a phone line using the first modem; placing the first modem in an audio mode; enabling the first modem audio subsystem to provide a voice communication path between the first modem and the first VoIP application; mixing an audio stream received from the first modem with an audio stream received from the microphone to generate a first mix; and sending the first mix to the first VoIP application.

Abstract: There is provided a system and method for a spot plated leadframe and an IC bond pad via array design for copper wire. There is provided a semiconductor package comprising a leadframe having a pre-plated finish and a spot plating on said pre-plated finish, a semiconductor die including a bond pad on a top surface thereof, and a copper wire bonded to said spot plating and to said bond pad. Optionally, a novel corner via array design may be provided under the bond pad for improved package performance while maintaining the integrity of the copper wire bond. The semiconductor package may provide several advantages including high MSL ratings, simplified assembly cycles, avoidance of tin whisker issues, and low cost compared to conventional packages using gold wire bonds.

Abstract: Acoustic echoes in communications systems are distracting and undesirable. Acoustic echoes occur in communications systems where sound produced by a speaker is picked up by a microphone in a communications system. In a stereo playback environment, echo cancellation techniques become more complicated. Echo cancellation can be performed by performing echo cancellation on a center signal, which is the sum of a left channel signal and the right channel signal, or left signal and a difference signal, which is the difference of the right channel signal and the left channel signal. The adaptation rates of the two echo cancellers meet certain constraints to prevent degeneracies in the echo cancellation system.