Abstract: The CMP technology is provided for a damascene wiring structure having a plural-layer wiring that is excellent in flatness and resolvability of Cu residue. An evaluation substrate is provided for evaluating the condition of a CMP that is employed for configuring a semiconductor device having a plurality of wirings in a vertical direction, and the evaluation substrate comprises: a substrate; a first groove formed on the substrate; a second groove formed on the substrate; and wiring material provided in the first groove and the second groove, wherein a depth of the second groove is shallower than that of the first groove.

Abstract: The CMP technology is provided of providing a damascene wiring structure having a plural-layer wiring that is excellent in flatness and removability of Cu residue. An evaluation substrate is provided for evaluating a condition of a CMP that is employed for configuring a semiconductor device having a plurality of wirings in a vertical direction, and the evaluation substrate comprises: a substrate; a first groove formed on the substrate; a second groove formed on the substrate; and a material of the wiring provided in the first groove and the second groove, wherein a depth of the second groove is shallower than that of the first groove.