Abstract: A variable digital filter employs a variable rate sample clock with combinations of various digital filter elements such as an efficient implementation of decimation to achieve various filter realizations allowing a selectable output bandwidth. More specifically, a digital filter apparatus is coupled to receive input analog signals from a fixed anti-aliasing analog filter and optionally includes one or several stages of digital decimation filters, a low-pass filter, an optional equalizer, and an optional high-pass filter each of which may be programmed so as to configure the device with a variety of transfer characteristics. The filter device employs an input sample clock in the range of F-K*F, where, in a specific embodiment K is selected to be 2. The selectable combination of elements and stages used to form the filter needed is operative at a broad range of sample rates over a predetermined bandwidth range without loss of resolution.