Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol block Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.

Abstract: Systems and methods for FEC encoding, for example for 10GEPON are provided. For the upstream or downstream, multiple FEC encoding and decoding profiles are implemented that include various levels of FEC encoding. Then, for a given ONU, a selection between these FEC encoding profiles is made. The OLT can instruct the ONU which FEC encoding profile to use for upstream, and which FEC decoding profile to use for downstream.

Abstract: Communication traffic processing architectures and methods are disclosed. Processing load on main Central Processing Units (CPUs) can be alleviated by offloading data processing tasks to separate hardware.

Abstract: An apparatus consisting of a digital communication channel comprised of a multiplicity of lanes where data is striped across the lanes in a predefined sequence. Each lane has the ability to be powered down or powered up in response to the amount of data being held in a transmit buffer at one end of the communication channel. The method consists of monitoring the amount of data being held in the transmit buffer; making the decision of how many lanes are required based on the amount of data; sending signals to cause the required number of lanes to be powered down or powered up; and performing the required power down or power up action at the particular transmitter and receiver.

Abstract: There are disclosed systems and methods for reducing the average delay and the average delay variation of network communication data in a buffer. The buffer comprises a plurality of memory entries, and associated with the buffer is a read point and a write pointer. The buffer has a depth defined as the number of memory entries in the buffer between the memory entry pointed to by the read pointer and the memory entry pointed to by the write pointer. In one embodiment, at least one of the read pointer and the write pointer is initially set to establish the depth of the buffer to be a first value. The variation of the depth of the buffer is then monitored for a predetermined period of time as network communication data flows through the buffer. The depth of the buffer is then reduced based upon this monitoring.

Abstract: An AC coupling circuit is provided that has a level shifter circuit having a p input voltage and an n input voltage and producing a p output voltage and a p output voltage. There is a common mode voltage adjustment feedback circuit configured to cause a common mode voltage output to tend towards a specified reference voltage, the common mode voltage output being an average of the p output and n output voltages of the level shifter circuit. In combination, the level shifter circuit and the feedback circuit allow the interconnection of a first circuit that operates at a first, unspecified, common mode voltage to be connected to a second circuit having a required common mode voltage. The level shifter may be formed of adjustable components such that the frequency response of the level shifter circuit can be adjusted to compensate for a frequency response of an interconnect between the first circuit and the second circuit.

Abstract: A circuit having a component for signal recovery, such as an adaptive equalizer, may be tested in order to ensure that the component operates properly. Unfortunately, external test equipment may be expensive and prone to being damaged. According to an aspect of the disclosure, there is provided a circuit including BIST (Built-in Self-Test) circuitry for testing a component for signal recovery with a stress signal that simulates an imperfect signal received over a communication channel. The circuit also has a detector for determining whether the component is operating properly with the stress signal. Thus, no external test equipment is needed for testing the component. In some implementations, the BIST circuitry includes a low-pass filter for filtering a transmit signal into the stress signal. Thus, the amount of circuitry involved in generating the stress signal can be reduced.

Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol block Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.

Abstract: There are disclosed techniques for power control in an Optical Network Unit (ONU) of a Passive Optical Network (PON). In one embodiment, the supply of power to an optical transmitter is controlled in accordance with information defining a plurality of transmission windows during which data can be transmitted from the ONU, in order to achieve the following: (1) to provide power to the optical transmitter beginning at a predetermined time in advance of a transmission window to ensure a laser in the optical transmitter is ready to begin transmitting the data at the start of the transmission window; and (2) to refrain from providing full power to the optical transmitter between transmission windows when the duration of time between the transmission windows is greater than a predetermined length.

Abstract: Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.

Abstract: High-speed networking application equipments with a layer-2 to layer-7 hardware search engine and method are with flexibility and performance improvement. The multi-layer switches/routers, network address translation (NAT) gateway, firewall/VPN router and network attached storage (NAS) may use the search engine for fast and efficient search requirement.

Abstract: Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.

Abstract: Systems and methods for performing protection switching in a passive optical network are provided. When a fiber cut is detected, control and management plane applications are not immediately informed. A rapid re-registration procedure is instigated upon detection of a fiber cut event. This allows multiple optical network units to re-register quickly without restarting control and management applications.

Abstract: A method of operation of a network system including a network line terminal coupled to a slave network unit and a master network unit over a first network includes: calculating a master round trip time between the network line terminal and the master network unit; sending a master message to the slave network unit, the master message having the master round trip time and a master local time; and calculating a slave local time based on the master round trip time and the master local time.

Abstract: Data encoding apparatus and methods are disclosed. A Cyclic Redundancy Check (CRC) coding module is selected, from a plurality of different CRC coding modules, for coding a block of information. A generic coder, which is configurable to perform CRC coding based on any of the plurality of different CRC coding modules, is configured to perform CRC coding for the block of information based on the selected CRC coding module. A block of information for which a coding operation is to be performed may be segmented into a plurality of segments having respective lengths. Respective generic coders may be configured to perform the coding operation for the plurality of segments. In this case, a result of the coding operation for the block of information may be determined based on results of the coding operations for the plurality of data segments.

Abstract: Apparatus and techniques relating to data interface power consumption control are disclosed. Components of a data transfer module may be selectively moved between their normal operating states and reduced power states at times when the data transfer module is not to be used for transferring data. Decisions as to particular components that are to be moved to their reduced power states may be based on respective timing characteristics of the components and/or respective power consumption characteristics of the components, for example. In some embodiments, an action may be performed to reduce a powering up time of the data transfer module when normal operation of the data transfer module is to resume. In the case of a multiple-connection interface having respective data transfer modules for each connection, the interface may be partially shut down by moving a subset of the data transfer modules into reduced power states.

Abstract: Signal format conversion apparatus and methods involve converting data signals between a first signal format associated with a first reference clock rate and a second signal format that is different from the first signal format and is associated with a second reference clock rate different from the first reference clock rate. A period of the second signal format is changed to match a period of a third signal format by controlling a synchronized second reference clock rate that is applied in converting data signals between the first signal format and the second signal format. The synchronized second reference clock rate is different from the second reference clock rate and is synchronized with a third reference clock rate. The third reference clock rate is associated with the third signal format. Such synchronization simplifies conversion of signals between the second and third signal formats.

Abstract: There are disclosed systems and methods for detecting whether an Optical Network Unit (ONU) in a network may be causing a communications interference due to laser overlap. In one embodiment, an Optical Line Terminal (OLT) selects a pair of ONUs suspected of possibly causing laser overlap. The OLT then grants a first window to a first ONU for transmitting a first message, and grants to another ONU different from the pair of ONUs a second window for transmitting a second message. If the first message is not received by the OLT, then the OLT indicates that the first ONU may be causing laser overlap. In another embodiment, the OLT grants to an ONU a window for transmitting a message to the OLT. If the message is not received by the OLT when expected, then the OLT indicates that the ONU may be causing laser overlap. Other embodiments are disclosed.

Abstract: Despite a recent revision, IEEE 1588™-2008 does not provide a complete implementation for PTP (precision time protocol) that accounts for variable delays introduced by network components. According to a broad aspect, the present disclosure provides implementations that account for variable delays introduced by network components. Therefore, the amount of time that a packet spends in transit through a transparent clock can be accounted for. According to another broad aspect, there is provided a master-slave mode that allows a transparent clock to function as a master or a slave to another clock.

Abstract: A method of manufacture a transport network system includes: receiving input data having an input encoding; generating encoded data, having a transcode encoding, from the input data; generating an error correction redundancy for the encoded data; and sending an output frame, having the encoded data and the error correction redundancy, for increasing a net coding gain of the output frame based on the transcode encoding and the error correction redundancy.