Abstract: The invention concerns a method for verifying, prior to fabrication, the proper operation of integrated circuit electronic systems using analog signals. It comprises the following steps: identifying (22) the noise-sensitive circuits, setting an acceptable sensitivity template for these noise-sensitive circuits, identifying (34) the noise-generating circuits, modeling the noise, determining (50) the function for transferring noise to the sensitive circuits, and comparing (58) the level of noise reaching the sensitive circuits to an acceptable sensitivity threshold template for the sensitive circuits.