Patents Assigned to CP8 Transac
  • Patent number: 6275982
    Abstract: The present invention relates to a device and process for executing code sequences in a support comprising an integrated circuit (10) capable of executing code sequences, as well as a first memory (12) containing a main program and possibly other code sequences executable by the integrated circuit, a second nonvolatile programmable memory (11) possibly containing code sequences executable by the integrated circuit, and a third working memory (14), characterized in that an orientation table contained in the second memory (11) contains at least one field containing a code reference data element of first means (INS_INT) which make it possible to verify the presence of a code reference, to store in working memory the address data element associated with the code reference and to set a trap indicator DI, and of second means (INS_ORT) which make it possible to test the trap indicator DI, and to execute the jump to the address indicated by the contents of the working memory AD_SAUT.
    Type: Grant
    Filed: December 27, 1997
    Date of Patent: August 14, 2001
    Assignee: CP8 Transac
    Inventor: Azadali Nassor
  • Patent number: 6205194
    Abstract: A device for communicating with a portable data medium using at least a power signal (AL) supplied by an electric energy source (4), a control signal (SC1) and a data transmission signal (I/O), comprises an interrupter (5) for interrupting the power signal (AL) to the medium from the source if the portable data medium does not cooperate with the device (1), means (8) for storing electric energy received from the source and for supplying the power signal to the medium when the source does not supply power and a data processor (3) arranged to ensure transmission of the power, control and data transmission signals (AL, SC1, I/O) to the medium according to a predetermined sequencing, as well as for detecting the interruption of the power signal (AL) from the source, then for triggering the interruption of the control and data transmission signals (SC1, I/O) according to the predetermined sequencing during the supply of the power signal from the energy storage mean.
    Type: Grant
    Filed: February 25, 1998
    Date of Patent: March 20, 2001
    Assignee: CP8 Transac
    Inventor: Jean-Pierre Lafon
  • Patent number: 5944833
    Abstract: The present invention relates to an improved integrated circuit for a microprocessor controlled by at least one program and the process for using the circuit which includes means which can decorrelate the running of at least one instruction sequence of a program from internal or external electrical signals of the integrated circuit. The internal or external electrical signals include timing, synchronization and status signals.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: August 31, 1999
    Assignee: CP8 Transac
    Inventor: Michel Ugon
  • Patent number: 5825875
    Abstract: The invention relates to a process for loading a protected storage zone of an information processing device, with confidential data and/or programs, and to the associated information processing device.The information processing device (1) includes a module (8) that includes a non-volatile memory having a protected zone (11) which is read-write accessible to a processing means (9) inside the module, but is at least write-protected from outside the module. The process executes a transfer of confidential information to the protected zone (11) from an analogous protected zone (27) of a portable object (21) with a structure similar to that of the module. The portable object is received in a portable object reader (6) which is provided in the information processing device.
    Type: Grant
    Filed: October 11, 1995
    Date of Patent: October 20, 1998
    Assignee: CP8 Transac
    Inventor: Michel Ugon
  • Patent number: 5790675
    Abstract: A novel asymmetrical cryptographic schema which can be used for enciphering, signature and authentication. The schema is based on low degree public polynomial equations with value in a finite ring K.The mechanism is not necessarily bijective. The secret key makes it possible to hide polynomial equations with value in extensions of the ring K. The solving of these equations makes it possible, if one has the secret key, to execute operations which are not executable with the public key alone.
    Type: Grant
    Filed: July 24, 1996
    Date of Patent: August 4, 1998
    Assignee: CP8 Transac
    Inventor: Jacques Patarin
  • Patent number: 5729609
    Abstract: The invention relates to a method and an apparatus for producing a key that is common to two devices that belong to different sets and are intended to implement a common cryptographic procedure. Each device is assigned a mother key (KC, KP) and a daughter key (KP.sub.ck, KC.sub.pi). The daughter key is developed on the basis of the mother key of the other device and of an identification datum specific to the device. When the procedure is performed, the two devices exchange their identification datum (ck, pi), which when processed with the aid of the mother key held by the device will yield the daughter key (KC.sub.pi, KP.sub.ck) of the other device. The pair of keys formed by the daughter key already held and by the daughter key that is calculated constitutes the common key.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: March 17, 1998
    Assignee: CP8 Transac
    Inventors: Yves Moulart, Michel Dawirs, Michel Hazard
  • Patent number: D392623
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: March 24, 1998
    Assignees: MVE, CP8 Transac
    Inventor: Jean-Pierre Gerbaulet