Abstract: A pulse-width modulation circuit includes an oscillator stage. The oscillator stage includes a first voltage comparator having a first input terminal, a second input terminal and an output terminal. A first capacitor is coupled to the first input terminal of the first voltage comparator. A charging path for the first capacitor is coupled between the first capacitor and the output terminal of the first voltage comparator, the charging path having a first resistance. A discharging path for the first capacitor is coupled between the first capacitor and the output terminal of the first voltage comparator, the discharging path having a second resistance that is different from the first resistance. A duty cycle of a clock signal generated by the oscillator stage is determined based on a first RC time constant for charging the first capacitor and a second RC time constant for discharging the first capacitor.

Abstract: A radiation tolerant discrete reference voltage source includes just two bipolar junction transistors, five resistors, and a Zener diode. Two of the resistors form a voltage divider that outputs a reference voltage. Values of the resistors included in the voltage divider can be selected to output a desired reference voltage level, for example, 5.00V, 4.00V, or 2.50V, which obviates a need to procure unique voltage references for those reference voltage levels and provides design flexibility. The radiation tolerant discrete reference voltage source provides improved control over radiation hardness and does not require high gain transistors. Because relatively few, inexpensive components are used, the radiation tolerant discrete reference voltage source can be produced at a low cost.

Abstract: A radiation tolerant gate driver for power converters with active-clamp reset and active-driven synchronous rectification uses integrated logic drivers for high efficiency and wide input range. A keep alive circuit prevents power train transistors from remaining on for extended durations after a transient or an undervoltage lockout (UVLO) event. Each of the integrated logic drivers includes two gate driver circuits, where one of the gate driver circuits uses the output of the other of the gate driver circuits as input per a logic table of the integrated logic driver, to ensure no shoot-through when the respective power train transistors are turned on and off.

Abstract: A circuit includes a voltage detection path having a first transistor and a second transistor coupled to the first voltage detection path by a first terminal of the second transistor. The first voltage detection path includes: a first current source and a first voltage divider unit coupled to the first current source. The first transistor is coupled to the first voltage divider unit by a first terminal of the first transistor. A first voltage value at a second terminal of the first transistor is configured to switch between a first high voltage value and a first low voltage value at least partially based on a first detection voltage value provided at the first terminal of the first transistor by the first voltage divider unit. A second voltage at a second terminal of the second transistor is configured to switch between a second high voltage value and a second low voltage value at least partially based on the first voltage value at the second terminal of the first transistor.

Abstract: A multilayer electronics assembly and associated method of manufacture are provided. The multilayer electronics assembly includes a plurality of stacked substrate layers. Each of the substrate layers is fusion bonded to at least an adjacent one of the plurality of substrate layers. A first discrete electrical circuit component is bonded to a first layer of the plurality of layers. A bonding material is interposed between the discrete electrical circuit component and the first layer. The bonding material has a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers.

Abstract: Systems and methods for providing peak current mode control (PCMC) for power converters. Noise immunity is improved by enhancing the signal-to-noise ratio of an inductor (or switch) current to achieve minimum duty cycle resolution and eliminate subharmonic operation that causes high input and output ripples. Current is sensed and translated to a voltage by a current sense resistor for peak current mode control scheme. A direct current (DC) offset voltage is added only during an on-time of the main switch to increase the signal-to-noise ratio. A leading-edge spike caused by turn-on of the main switch is removed by resetting a filter capacitor of a current sense circuit to zero volts after each switching cycle.

Abstract: Systems and methods for providing peak current mode control (PCMC) for power converters using discrete analog components. A pair of complementary bipolar junction transistors may be used to set a maximum duty cycle for the power converter. PCMC may be achieved using a comparator that compares peak input current to an error feedback signal and terminates a pulse-width modulation (PWM) pulse when the peak input current exceeds the error feedback signal. A magnetic signal transformer may be used to establish a secondary side bias voltage supply, to return the error signal, and to drive an AC-coupled signal for a synchronous gate drive. A synchronous switch may be turned on when the main switch is turned off via an output winding of the flyback transformer and may be turned off by the trailing edge of a clock pulse from the magnetic signal transformer before the main switch is turned on.

Abstract: Systems and methods for providing peak current mode control (PCMC) for power converters using discrete analog components. Peak current mode control functionality for latching, set, reset, clocking and slope compensation is provided via available analog components that provide improved performance, design flexibility, reliability, and radiation tolerance. Discrete analog components may include analog comparators, resistors, capacitors, diodes, etc.

Abstract: A circuit for providing dynamic output current sharing using average current mode control for active-reset and self-driven synchronous rectification with pre-bias startup and redundancy capabilities for power converters. The circuit communicates a secondary side feedback signal to a primary side via a bidirectional magnetic communicator that also provides a secondary voltage supply. Pre-bias startup is achieved by detection of the output current direction and controlling the gate signals of synchronous rectifiers. The circuit permits dynamic current sharing via a single-control signal and automatic master converter selection and promotion.

Abstract: A circuit for providing dynamic output current sharing using average current mode control for active-reset and self-driven synchronous rectification with pre-bias startup and redundancy capabilities for power converters. The circuit communicates a secondary side feedback signal to a primary side via a bidirectional magnetic communicator that also provides a secondary voltage supply. Pre-bias startup is achieved by detection of the output current direction and controlling the gate signals of synchronous rectifiers. The circuit permits dynamic current sharing via a single-control signal and automatic master converter selection and promotion.

Abstract: Systems and methods are disclosed for providing over-voltage protection for power converters. An over-voltage protection loop includes an error amplifier that maintains an external reference voltage within a highly precise range that can be used to provide a highly precise output voltage from the over-voltage protection loop. The over-voltage protection loop may also include feedback impedance that delays the output of the over-voltage protection loop. The delay may prevent the over-voltage protection loop from being engaged due to voltage transients output from a main servo loop circuit that provides a nominal output voltage under normal operation, thus allowing the threshold voltage and output voltage of the over-voltage protection loop to be set close to the nominal output voltage of the main servo loop circuit.

Abstract: Systems and methods are disclosed for providing over-voltage protection for power converters. An over-voltage protection loop includes an error amplifier that maintains an external reference voltage within a highly precise range that can be used to provide a highly precise output voltage from the over-voltage protection loop. The over-voltage protection loop may also include feedback impedance that delays the output of the over-voltage protection loop. The delay may prevent the over-voltage protection loop from being engaged due to voltage transients output from a main servo loop circuit that provides a nominal output voltage under normal operation, thus allowing the threshold voltage and output voltage of the over-voltage protection loop to be set close to the nominal output voltage of the main servo loop circuit.

Abstract: A power converter has a transformer having three primary windings configured to receive respective phases of a three-phase alternating current (AC) input signal in a delta configuration and three secondary windings, each split into two portions, wherein the portions are coupled together in a regular hexagon. The power converter includes a rectifier having a first rectifier path coupled between taps of the secondary windings and a positive output of the power converter and a second rectifier path coupled between taps of the secondary windings and a negative output. One of the secondary windings may be reversed with respect to the other secondary windings. The primary windings may be split with a corresponding secondary winding sandwiched between portions of the primary. One of the paths may have a different inductance than the other path.

Abstract: Systems and methods for providing a self-driven synchronous rectification circuit for an active-clamp forward converter which includes automatically enhancing synchronous MOSFETs and maximizing input voltage range. The gate signals for the synchronous MOSFETs are derived from a unipolar magnetic coupling signal instead of a bipolarized magnetic coupling signal. The unipolar signal is retained for fully enhanced driving of the MOSFETs at low line voltage and the unipolar signal is automatically converted to a bipolar signal at high line amplitude due to line variance to maximize input voltage range by utilizing non-polarized characteristics of the MOSFET gate-to-source voltage (Vgs). The circuit permits efficient scaling for higher output voltages such as 12 volts DC or 15 volts DC, without requiring extra windings on the transformer of the forward converter.

Abstract: Systems and methods that allow for weight and size reduction of electronics components, such as transformer rectifier units (TRUs) or autotransformer rectifier units (ATRUs), by providing a fluid cooling system is utilized to provide high heat dissipation for a transformer assembly of TRUs or ATRUs by providing a thermal interface at the windings of the transformer assembly, which are the hottest spots in such assemblies. The cooling system may include a fluid-cooled winding heat sink element or “finger,” which may be a thermally conductive bar (e.g., aluminum, copper) having microchannels therein positioned between the core and windings of a transformer or between turns of the windings of a transformer. Fluid passes through the microchannels of the heat sink element to provide direct cooling to the heat generating windings of the transformers. The heat sink element may be produced by an additive manufacturing technology.

Abstract: This disclosure describes systems, methods and articles of a passive EMI filter integrated with an active boost converter for low-side line transients and/or an active clipper for high-side line transients. During steady-state operation, the active circuitry is disabled so the circuit functions as a passive EMI filter. Inductive and capacitive components used in the passive EMI filter during steady-state operation may serve a dual role and become part of a boost converter when input voltage is below a low-line steady-state and, in some variations, the inductive and capacitive components may become part of a transient clipper when the input voltage is above a high-line steady-state level. The transient clipper may be implemented as a linear pass element or as a switch-mode converter (e.g., buck converter).

Abstract: An oscillator formed from low cost discrete semiconductors and passive devices creates a linear periodic ramp of constant frequency with ramp slope based on an external voltage signal. Parameters are stable over a wide range of temperatures and variations of transistor parameters that normally degrade in extreme environments. The oscillator period can be phase and frequency synchronized to an external clock source over a wide range of frequencies. The oscillator ramp generator phase can be synchronized on a cycle by cycle basis for incorporation in power converters employing spread spectral EMI reduction techniques, multi-converter systems employing clock interleaving for distribution bus filter optimization, and resonant mode converters employing zero voltage switching techniques. Oscillator ramp rate is independent of frequency and can be synchronized to DC (inhibit) for use in ultra low power burst mode power conversion.

Abstract: Control circuitry handles inrush current, and may provide under voltage and/or over voltage monitoring and handling, as well as remote enable handling. The circuitry may advantageously employ a sense capacitor in parallel with an input capacitor (e.g., bulk input filter capacitor), and a current mirror to produce a signal proportional to input current. A clamp circuit may control a series pass device to regulate current in response to the proportional signal, or to interrupt current flow in response to an under voltage or over voltage condition or receipt of a signal indicative of a disable state. An enable signal may be summed into a comparator that handles under voltage condition determination.

Abstract: A dual compensation operational amplifier is suitable for use in an environment that experiences fluctuations in ambient energy levels. A dual compensation impedance can be determined to nullify or compensate for effects of an input offset voltage or an input bias current or both. Adjustments to the dual compensation impedance can be made based on calibration data for various environmental conditions so that the dual compensation impedance can be either pre-set for anticipated conditions in different target operational environments, or automatically adjusted in-situ. Target operational environments that may benefit from such a dual compensation impedance include remote areas that experience extreme or variable temperatures, high altitudes, space, or high radiation environments.

Abstract: A power converter provides current limit/current share functionality, allowing use in a point-of-load architecture and/or in parallel with one or more other power converters. An inner current control loop may sense output current over only a portion of a duty cycle, for example at a low side active switch. The resulting signal is compensated, and may be level shifted, for example via a resistor divider network, and supplied to a current control amplifier. An outer voltage control loop may sense output voltage, and provide a voltage error signal from a voltage error amplifier to the resistor divider network. Power converters are operable as masters or slaves, and include sense input and trim input terminals.