Abstract: Light emitting device die having a mesa configuration on a substrate and an electrode on the mesa are attached to a submount in a flip-chip configuration by forming predefined pattern of conductive die attach material on at least one of the electrode and the submount and mounting the light emitting device die to the submount. The predefined pattern of conductive die attach material is selected so as to prevent the conductive die attach material from contacting regions of having opposite conductivity types when the light emitting device die is mounted to the submount. The predefined pattern of conductive die attach material may provide a volume of die attach material that is less than a volume defined by an area of the electrode and a distance between the electrode and the submount. Light emitting device dies having predefined patterns of conductive die attach material are also provided.

Abstract: A LDMOS transistor having a gate shield provides reduced drain coupling to the gate shield and source by restricting the thickness of the gate shield and by confining a source contact to the source region without overlap of the gate.

Abstract: Light emitting device die having a mesa configuration on a substrate and an electrode on the mesa are attached to a submount in a flip-chip configuration by forming predefined pattern of conductive die attach material on at least one of the electrode and the submount and mounting the light emitting device die to the submount. The predefined pattern of conductive die attach material is selected so as to prevent the conductive die attach material from contacting regions of having opposite conductivity types when the light emitting device die is mounted to the submount. The predefined pattern of conductive die attach material may provide a volume of die attach material that is less than a volume defined by an area of the electrode and a distance between the electrode and the submount. Light emitting device dies having predefined patterns of conductive die attach material are also provided.

Abstract: Reduced source resistance is realized in a laterally diffused MOS transistor by fabricating the transistor in a P-doped epitaxial layer on an N-doped semiconductor substrate and using a trench contact for ohmically connecting the N-doped source region to the N-doped substrate.