Abstract: Biological measurement systems and methods are described. In one embodiment, a biological function monitoring system includes a first monitoring device, including a first sensor, a first processor, and a first transmitter. The first sensor senses a first biological function measurement during monitoring a biological function and derives a first data symbol representing the first biological function measurement. The first processor accesses the first data symbol from the first sensor, and combines two or more chaotic waveforms from a first chaotic waveform ensemble, generating a first composite chaotic waveform. The first transmitter transmits the first composite chaotic waveform to a receiver over a communication channel. The biological function monitoring system may include a second monitoring device that is similar to the first monitoring device.

Abstract: Systems and methods for integrated communication security are described. One aspect includes a clock generator configured to generate a clock signal at a first frequency, and a circuit utilizing the clock signal. The circuit may include a port configured to receive an encryption sequence at the first frequency, and a first unidirectional data path between the port and a memory configured to permit data transfer from the port to the memory. The memory may be configured to access the encryption sequence from the port via the first unidirectional data path and store the data. The circuit may further include a clock divider configured to divide the first frequency by a divisor deriving another clock signal at a second frequency, and an encryption/decryption module configured to read a portion of the encryption sequence from the memory, process input using the portion of the encryption sequence, and generate output responsive to the processing.

Abstract: Systems and methods for integrated communication security are described. One aspect includes a clock generator configured to generate a clock signal at a first frequency, and a circuit utilizing the clock signal. The circuit may include a port configured to receive an encryption sequence at the first frequency, and a first unidirectional data path between the port and a memory configured to permit data transfer from the port to the memory. The memory may be configured to access the encryption sequence from the port via the first unidirectional data path and store the data. The circuit may further include a clock divider configured to divide the first frequency by a divisor deriving another clock signal at a second frequency, and an encryption/decryption module configured to read a portion of the encryption sequence from the memory, process input using the portion of the encryption sequence, and generate output responsive to the processing.