Abstract: A process for forming an electronic component carrier, the electronic carrier having routing layers parallel to an aluminum substrate and vias perpendicular to the aluminum substrate, the process comprising defining routing layers by forming a blocking mask on the aluminum substrate, the blocking mask leaving exposed areas corresponding to the routing layers, carrying out a barrier anodization process on the aluminum substrate to form a surface barrier oxide over the routing layers, removing the blocking mask, providing an upper aluminum layer over the aluminum substrate, defining vias by forming a blocking mask on the upper aluminum layer, the blocking mask covering areas corresponding to the vias, and subjecting both the aluminum substrate and the upper aluminum layer to porous anodization. The barrier oxide defining the routing layer provides reliable masking of the routing layer during porous anodization.