Abstract: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.
Abstract: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.
Abstract: There is provided a novel storage system in which the number of signal lines will not increase even if the number of storage devices to be connected in a RAID system increases, and a novel data transfer method to enable a high-speed data transfer even when the transfer rate of the IDE device side is low. A RAID system (10) which is a storage system in which a RAID controller (11) connected to an ATA host and a plurality of IDE devices (12A to 12D, and 22A to 22D) are connected by an IDE bus, characterized in that at least two or more IDE devices are connected to one channel of the IDE bus and said RAID controller and each of said IDE devices are connected by a common data bus and a common address bus within the same channel.
Type:
Grant
Filed:
September 21, 2007
Date of Patent:
December 21, 2010
Assignees:
Zentek Technology Japan, Inc, D-Broad, Inc.