Abstract: A decoding system uses iterative decoding techniques to decode signals encoded with lattice codes and/or multilevel coset codes.

Abstract: A method and apparatus for reducing power consumption of a receiver is provided. The receiver may have an identification number and may receive a portion of a hailing message in a non-sequential manner. The portion may comprise a segment of a hailed identification number. According to some embodiments of the present invention, the apparatus for reducing power consumption may comprise a comparator to compare between the segment of the hailed identification number to a respective segment of the identification number of the receiver.

Abstract: Interference reduction is achieved within a communication device using a low complexity antenna array. In at least one embodiment, phase and magnitude values associated with an antenna element within a low complexity array are dynamically adjusted during device operation in a manner that enhances a predetermined quality criterion (e.g., SINR).

Abstract: A nonlinear response function of a loudspeaker is determined by an iterative process during which the nonlinear response function and a linear response associated with an echo and microphone are alternately revised.

Abstract: A method for calculating the mask for an arbitrary delay of a pseudo-noise sequence uses only XOR operations on previously calculated masks. A method for calculating the mask for an arbitrary delay of a pseudo-noise sequence whose shift register polynomial is of order R uses no more than NOP operations where NOP is independent of the delay and NOP is on the order of R.

Abstract: A switchable low pass filter includes a first switch connected to a first resistive element, a second switch connected to a second resistive element, and a capacitive element connected to the first and second resistive elements. The switchable low pass filter also includes a controller connected to the first switch and the second switch, the controller operative to open and close at least one of the first switch and the second switch. A method for producing a pulse density modulated signal whose pulse timing is jittered includes the following steps; adding a substantially random number and a multi-bit number to a value stored in a flip flop, thereby producing a sum; if the sum is less than an upper limit, storing the sum in the flip flop, thereby replacing the value; if the sum is not less than the upper limit, producing a pulse, subtracting the upper limit from the sum, thereby producing a result, and storing the result in a flip flop; and repeating the steps.

Abstract: A timer for measuring a time period including a high frequency generating unit, a low frequency generating unit and a controller connected to the high and low frequency generating units, wherein the controller deactivates the high frequency generating unit during at least a portion of the time period, detects and counts predetermined portions of the signals provided by the high and low frequency generating units and counts a plurality of the portions of the currently active frequency generating unit.

Abstract: A frequency offset synchronizer is provided which includes an initial timing estimator, and a combined frequency offset and refined timing estimator. The initial timing estimator determines a rough timing value from input data samples and a reference synchronization word. The combined frequency offset and refined timing estimator operates in the close vicinity of the rough timing estimate and determines the frequency offset and synchronization timing from the input data samples and the reference synchronization word.

Abstract: A device for power management of a receiver includes a soft decoder and a power reducer. The receiver receives repetitions of a word containing a message possibly addressed to the receiver. The soft decoder soft decodes at least one of the repetitions to produce a codeword, and the power reducer reduces power to the receiver when the message contained in the codeword is not addressed to the receiver. The receiver may be a mobile telephone, a wireless local loop, a pager, or a cordless telephone. A method for managing power in a receiver includes the steps of receiving a repetition of a word containing a message possibly addressed to the receiver and combining the repetition with previous repetitions of the word. Candidates are generated from information contained in the combination, and a best candidate is selected from the generated candidates. The probable reliability of the best candidate is determined.

Abstract: A unit for determining whether or not a received channel is a control channel is provided. The unit includes a superframe phase estimator and a state machine. The superframe phase estimator estimates the superframe phase based on elapsed time. The state machine determines the validity and the value of a decoded superframe phase field of a received time slot based on the quality of the decoding and in comparison to the estimated superframe phase. The state machine also initializes the superframe estimator.

Abstract: A method for analyzing the channel using the preceding slot synchronization sequence is provided. The method of the invention is for operating a receiver receiving a signal frame in a dynamic channel wherein the signal frame includes a plurality of slots, each including a plurality of data bits. Each of the slots further includes a synchronization sequence wherein at least a predetermined one of the slots is assigned for the receiver. The preceding slot following the receiver assigned slot includes a varying synchronization sequence which is selected from a group of predetermined synchronization sequences postulates. The method includes the steps of calculating from the preceding slot synchronization sequence an estimated taps value for each of the synchronization sequence postulates, calculating from the preceding step synchronization sequence a log likelihood metric value C(y,h) for each of the synchronization sequence postulates and selecting the synchronization word postulate having the best metric value.

Abstract: A noise suppressor is provided which includes a signal to noise ratio (SNR) determiner, a channel gain determiner, a gain smoother and a multiplier. The SNR determiner determines the SNR per channel of the input signal. The channel gain determiner determines a channel gain &ggr;ch(i) per the ith channel. The gain smoother produces a smoothed gain {overscore (&ggr;ch+L (i,m))} per the ith channel and the multiplier multiplies each channel of the input signal by its associated smoothed gain {overscore (&ggr;ch+L (i,m))}.

Abstract: An initial frame timing acquisition unit includes an initial timing estimator, and a combined frequency offset and refined timing estimator. The initial timing estimator determines a rough timing value from input data samples and a reference synchronization word. The combined frequency offset and refined timing estimator operates in the close vicinity of the rough timing estimate and determines the frequency offset and synchronization timing from the input data samples and the reference synchronization word.

Abstract: A timer for measuring a time period including a high frequency generating unit, a low frequency generating unit and a controller connected to the high and low frequency generating units, wherein the controller deactivates the high frequency generating unit during at least a portion of the time period, detects and counts predetermined portions of the signals provided by the high and low frequency generating units and counts a plurality of the portions of the currently active frequency generating unit.

Abstract: Method for acquiring frequency of a desired channel having a carrier frequency FMAIN, for a dynamic receiver frequency FMOBILE, from a starting frequency FSTART, in the presence of high power adjacent interfering channels, wherein the starting frequency FSTART is shifted from FMAIN by not more than a predetermined frequency gap &Dgr;F, the method includes the steps of determining a first frequency boundary and a second frequency boundary, detecting channels within a filtering bandwidth, selecting a dominant channel from the detected channels, progressing the dynamic receiver frequency FMOBILE towards the carrier frequency of the dominant channel, detecting when the step of progressing has exceeded one of the first frequency boundary and the second frequency boundary, restarting the step of detecting channels, from the other of the one of the first frequency boundary and the second frequency boundary, and repeating from the step of detecting channels.

Abstract: A pilot acquisition unit for code division multiple access (CDMA) communication systems is provided which includes a fast Hadamard transform (FHT) unit and a pre-Hadamard processing unit. The FHT unit determines the quality, in accordance with a metric, of each of a set of possible pseudo-random number (PN) loadings and the pre-Hadamard processing unit generates a vector u per set of PN loadings. The vector u defines a quality metric of a received pilot signal with the set of possible PN loadings, the pre-Hadamard processing unit providing the vector u to the FHT unit.

Abstract: A method and system for receiving a signal in a received frequency and shifting the received frequency to become a desired frequency is provided. The system includes a controllable oscillator for generating a first internal frequency, a frequency estimating unit connected to the controllable oscillator, a first frequency shift unit, connected to the controllable oscillator and to the frequency estimating unit, for shifting the received frequency according to the first internal frequency, thereby obtaining an initially shifted frequency and a second frequency shift unit connected to the first frequency shift unit and the frequency estimating unit for shifting the initially shifted frequency. The frequency estimating unit determines a total frequency shift value from the desired frequency, the received frequency and the first internal frequency and it also determines a first frequency shift value and a second frequency shift value from the total frequency shift value.

Abstract: A synchronized frequency generating system is provided which includes a main crystal clock, for producing a basic frequency F.sub.B, a channel sampling phase locked loop (PLL) unit, connected to the main crystal clock, for converting the basic frequency F.sub.B into a channel sampling frequency F.sub.CS, a voice sampling PLL unit, connected to the main crystal clock, for converting the basic frequency F.sub.B into a voice sampling frequency F.sub.VS, a time tracking unit, connected to the channel sampling PLL unit, for detecting signal characteristics so as to determine a channel sampling frequency phase change value .DELTA..phi..sub.CS and a frame timing phase change value .DELTA..phi..sub.FRAME, and a frequency controller, connected to the voice sampling PLL. The frequency controller receives channel sampling frequency phase adjustment data and determines a voice sampling frequency phase change value .DELTA..phi..sub.VS. The frequency controller provides the voice sampling frequency phase change value .

Abstract: Apparatus for providing an optimized sampling phase to a received signal in a given channel, the received signal including inter-symbol interference. The apparatus includes a voltage controlled clock (VCC) for providing a VCC sampling phase, a first signal detector, connected to the VCC, for sampling the signal according to an advanced sampling phase which is advanced by a predetermined value .delta. with respect to the VCC sampling phase, thereby producing a first sampled signal, a second signal detector, connected to the VCC, for sampling the signal according to a delayed sampling phase which is delayed by a predetermined value .delta.

Abstract: A noise suppressor is provided which includes a signal to noise ration (SNR) determiner, a channel gain determiner, a gain smoother and a multiplier. The SNR determiner determines the SNR per channel of the input signal. The channel gain determiner determines a channel gain .gamma..sub.ch (i) per the ith channel. The gain smoother produces a smoothed gain .gamma..sub.ch (i,m) per the ith channel and the multiplier multiplies each channel of the input signal by its associated smoothed gain .gamma..sub.ch (i,m).