Abstract: An interface includes a slave digital signal processor (DSP) and a master DSP connected to the slave DSP through a communications port. The master DSP includes a memory; and a direct memory access (DMA) to the memory. A field programmable gate array (FPGA) is connected to the master DSP. The FPGA includes a dual port random access memory (RAM) in communication with the DMA. A universal serial bus (USB) interface is connected to the FPGA through the dual port RAM.