Abstract: An apparatus generates a set of a reference clock pulse and a reference frame pulse signals (RCPS and RFPS) for use in an access subsystem processor of an electronic switching system. At first, a set of a clock pulse and a frame pulse signals (CPS and FPS) generated from a processor associated with the apparatus is received and converted into a converted set of a RCPS and a RFPS. Next, a functional fail signal is obtained based on processor and signal status information from the link processor.