Patents Assigned to Daisy Systems Corporation
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Patent number: 4916647Abstract: Computer for implementing an event driven algorithm which utilizes a master processor and a plurality of processors arranged in modules, wherein the processors within the module are capable of operating independently of each other. The various modules are also capable of operating independently of each other and communicate with each other and the host unit by a unidirectional token ring bus. A specialized hardwired processor design is implemented to provide a pipelined flow of data to provide a more rapid algorithm simulation.Type: GrantFiled: June 26, 1987Date of Patent: April 10, 1990Assignee: Daisy Systems CorporationInventor: Gary M. Catlin
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Patent number: 4873656Abstract: Computer for implementing an event driven algorithm which utilizes a master processor and a plurality of processors arranged in modules, wherein the processors within the module are capable of operating independently of each other. The various modules are also capable of operating independently of each other and communicate with each other and the host unit by a unidirectional token ring bus. A specialized hardwired processor design is implemented to provide a pipelined flow of data to provide a more rapid algotithm simulation.Type: GrantFiled: June 26, 1987Date of Patent: October 10, 1989Assignee: Daisy Systems CorporationInventor: Gary M. Catlin
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Patent number: 4872125Abstract: Computer for implementing an event driven algorithm which utilizes a master processor and a plurality of processors arranged in modules, wherein the processors within the module are capable of operating independently of each other. The various modules are also capable of operating independently of each other and communicate with each other and the host unit by a unidirectional token ring bus. A specialized hardwired processor design is implemented to provide a pipelined flow of data to provide a more rapid simulation algorithm.Type: GrantFiled: January 11, 1988Date of Patent: October 3, 1989Assignee: Daisy Systems CorporationInventor: Gary M. Catlin
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Patent number: 4814983Abstract: A computer for implementing an event driven algorithm which is used in conjunction with a master computer is disclosed. The computer includes a plurality of processors coupled in a ring arrangement each of which is microprogrammable. Each processor includes a memory and a memory address generator. The generator can generate addresses based on a combination of signals from both the microcode and signals on the data bus.Type: GrantFiled: November 6, 1987Date of Patent: March 21, 1989Assignee: Daisy Systems CorporationInventor: Gary M. Catlin
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Patent number: 4751637Abstract: A computer for implementing an event driven algorithm which is used in conjunction with a master computer is disclosed. The computer includes a plurality of processors coupled in a ring arrangement each of which is microprogrammable. Each processor includes a memory and a memory address generator. The generator can generate addresses based on a combination of signals from both the microcode and signals on the data bus.Type: GrantFiled: March 28, 1984Date of Patent: June 14, 1988Assignee: Daisy Systems CorporationInventor: Gary M. Catlin
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Patent number: 4677433Abstract: The present invention relates to a method and apparatus for a system utilizing a microprocessor having a faster maximum operating frequency and a numeric data processor having a slower maximum operating frequency which runs the system at the lower clocking frequency only during those times when both the microprocessor and the numeric data processor are required to perform processing functions and runs the system at the higher clocking frequency when only the microprocessor is required. Therefore the method and apparatus of the invention provides greater operating efficiency for the microprocessor, while not sacrificing the interface capabilities of the numeric data processor. In the apparatus of the present invention, the clocking frequencies are generated by a clocking generator which is coupled to both the microprocessor and the numeric data processor. The generator responds to signals from a control source to provide either the faster or the slower clocking frequency.Type: GrantFiled: April 14, 1986Date of Patent: June 30, 1987Assignee: Daisy Systems CorporationInventors: Gary M. Catlin, Jim Klovstad
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Patent number: 4533911Abstract: A display system particularly useful in a computer aided design system. Symbols are formed for the display from a plurality of symbol-fragments stored in memory. By simple code changes, the computer can rotate symbols without, for example, a point-by-point movement of data in memory.Type: GrantFiled: February 24, 1982Date of Patent: August 6, 1985Assignee: Daisy Systems CorporationInventor: Aryeh Finegold
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Patent number: 4464715Abstract: A memory accessing method is described which is particularly useful with the Multibus where a dynamic memory is employed. When the memory is accessed without a refresh collision, a ready signal is generated before the acknowledgement signal. This saves considerable time since the time between the placement of the data on the bus and the CPU's sensing of the data is reduced.Type: GrantFiled: February 24, 1982Date of Patent: August 7, 1984Assignee: Daisy Systems CorporationInventor: David A. Stamm