Abstract: A microcontroller includes a program memory, data memory, central processing unit, at least one register module, a memory management unit, and a transport network. Instructions are executed in one clock cycle via an instruction word. The instruction word indicates the source module from which data is to be retrieved and the destination module to which data is to be stored. The address/data capability of an instruction word may be extended via a prefix module. If an operation is performed on the data, the source module or the destination module may perform the operation during the same clock cycle in which the data is transferred.

Abstract: A microcontroller and method for executing instructions from an 8051 instruction set are disclosed. The microcontroller includes first and second input/output (I/O) ports that are controlled such that the first I/O port is a dedicated data port and the second I/O port is a dedicated address port for performing memory cycles to external memory when in a page mode of operation. In addition, the cycle times of memory cycles to external memory is configurable so that the microcontroller is capable of more efficiently cooperating with both high speed and low speed external memory devices.

Abstract: Methods, systems, and arrangements enable increased security for a processor, including by implementing block encryption. The block may include multiple instructions and/or operations to be executed by the processor. The block may also include multiple bytes that are read into the processor byte by byte. Once a block-wide encrypted buffer has been filled from an external memory source, the block may be decrypted using an encryption algorithm (e.g., the Data Encryption Standard (DES), the triple DES, etc.), and the decrypted block may be forwarded to a decrypted buffer. The decrypted block may thereafter be moved into a cache, which may optionally be organized into an equivalent block width (e.g., for each way of a multi-way cache). Therefore, when a processing core/instruction decoder needs a new instruction, it may retrieve one from the cache, directly from the decrypted buffer, or from external memory (e.g., after undergoing decryption).

Abstract: Gas gauge circuitry for monitoring and accumulating various operating parameters of a rechargeable battery with selected parameters being used to determine the remaining operating life of a rechargeable battery, and includes a current monitor for measuring the current flow into and out of the rechargeable battery. An integrated current accumulator is connected to the current monitor and is used to maintain a net accumulated total of current flowing into and out of the rechargeable battery. A charging current accumulator, which is also coupled to the current meter is used to maintain the total current flowing into the rechargeable battery, while a discharging current accumulator is used to maintain the total current flowing out of the rechargeable battery. A highly accurate, oscillatory circuit is used to drive the accumulators to increase the accuracy of the gas gauge functions therefrom.

Abstract: A transmission line sampling circuit for a T1 line is disclosed. A multi phase oscillator is connected to a plurality of state machines which are connected in parallel to a transmission line. The use of a plurality of state machines to sample the transmission line effectively increases the sample rate of the transmission line beyond that which can ordinarily be supported by a single phase oscillator running at the same frequency of the multi phase oscillator. The outputs of the plurality of state machines are provided to an arbitrator and to a MUX wherein the arbitrator decides which of the four state machines outputs should be switched through the MUX and produced transmitted on an output line.

Abstract: The power cap includes a power supply positioned between a cover and a base. The cover is provided with clips to permit the attachment and detachment of the cover to the power supply and the base. The base is provided with surface mounted NRTC or NVSRAM chips and electrical contacts. The power supply is provided with a crystal oscillator and a battery for controlling the operation of the NRTC or NVSRAM chips, and spring contacts for maintaining the electrical connection between the base and the power supply.

Abstract: A voltage bias generating circuit is disclosed which comprises a voltage-controlled charge pump which operates at a high frequency relative to audio frequencies wherein a plurality of low pass filters are used to prevent the introduction of noise and distortion of audio signals being amplified through a digital potentiometer or resistor array.

Abstract: A digital potentiometer adapted for and connected to and interacting directly with a plurality of external switches. Specifically, the various wiper points of a semiconductor resistor array are selected, for each channel of an audio amplification device according to various switch selections. The method and apparatus disclosed also makes priority determinations if more than one external switch is selected at the same time according to which switch was selected first.

Abstract: An integrated circuit which provides a low-power RS232 interface (or other serial interface). The integrated circuit receives separate power supply inputs for its own logic and for driving the serial line. Even if one of the power supply inputs fails, protection circuitry clamps floating nodes in the logic elements, and thereby avoids excessive current drain which might otherwise occur.