Abstract: An artificial neural network computation acceleration apparatus for distributed processing includes an external main memory for storing input data and synapse weights for input neurons; an internal buffer memory for storing a synapse weight and input data required for each cycle constituting the artificial neural network computation; a DMA module for directly transmitting/receiving data to/from the external main memory and the internal buffer memory; and a general-use communication media block capable of transmitting/receiving the input data and the synapse weights for the input neurons and a result of the computation performed by the neural network computation device to/from another acceleration apparatus physically connected regardless of the type of an integrated circuit.

Abstract: The present invention relates to a neural network parameter optimization method and a neural network computation method and apparatus suitable for hardware implementation. The neural network parameter optimization method suitable for hardware implementation according to the present invention may include transforming an existing parameter of a neural network into a signed parameter and a magnitude parameter having a single value for each channel and generating an optimized parameter by pruning the transformed magnitude parameter. Accordingly, the present invention provides a neural network parameter optimization method and a neural network computation method and apparatus thereof, which optimize a large amount of computation and parameters of a convolutional neural network to be effective in hardware implementation, thereby achieving minimal accuracy loss and maximum computation speed.