Patents Assigned to Deog-Kyoon Jeog
  • Clock generator
    Patent number: 5705947
    Abstract: A system for converting between parallel data and serial data is described. In the system (10), individual bits of the parallel data (12) are latched into individual registers (117). Each register (117) is coupled to a corresponding AND gate (110) which is also connected to receive phased clock signals. The output terminals of the AND gates (110) are connected to an OR gate (115). Using the system, with appropriately phased clocks, the parallel data is converted into serial data.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: January 6, 1998
    Assignees: Deog-Kyoon Jeog, Sun Microsystems, Inc.
    Inventor: Deog-Kyoon Jeong