Patents Assigned to Department of Electronics and Information Technology
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Patent number: 11372068Abstract: It is an integrative platform for visualization, preprocessing and quantitation of MRS data acquired using single voxel, multi voxel magnetic resonance spectroscopy imaging (MRSI) and MEshcher-GArwood Point-RESolved Spectroscopy (MEGA-PRESS) acquisition methods. The method integrates both time- and frequency-domain signal processing methods on a single platform. The method is optimized for proton (1H) and phosphorous (31P) MRS data. It employs the use of iterative baseline estimation and fitting procedure to provide improved quantitation accuracy. The method can be used in both interactive and automatic mode to cater to the needs of researchers and clinicians.Type: GrantFiled: August 19, 2016Date of Patent: June 28, 2022Assignees: Secretary, Department of Electronics and Information Technology (DEITY), National Brain Research CentreInventors: Pravat K. Mandal, Monika Grewal, Shammi More, Sumiti Saharan, Deepika Shukla
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Patent number: 10745280Abstract: The invention relates to a compact thermal reactor for rapid growth of high quality carbon nanotubes (CNT2) produced by chemical process with low power consumption comprising: a processing chamber having a vacuum vessel, the vacuum vessel having a side cover formed of a first side wall and a second side wall, a top cover, a bottom cover connected to a support stand; feed through housing provided with a substrate; a heating system consisting of a heating element and back means; and at least one each inlet and outlet for gas injection into the process chamber for growing high quality carbon nanotubes over the substrate.Type: GrantFiled: May 26, 2015Date of Patent: August 18, 2020Assignees: Department of Electronics and Information Technology (DEITY), Jamia Millia Islamia UniversityInventors: Prabhash Mishra, Saikh Saiful Islam
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Patent number: 10720565Abstract: The present disclosure relates to piezoelectric compositions of Formula I comprising Lead Zirconate—Lead Titanate solid solution. The disclosure further relates to a method of obtaining said composition, method of preparing/fabricating piezoelectric component(s) and piezoelectric component(s)/article(s) obtained thereof. The piezoelectric composition and articles of the present disclosure show excellent electromechanical characteristics along with very large insulation resistance (IR).Type: GrantFiled: May 12, 2016Date of Patent: July 21, 2020Assignees: Department of Electronics and Information Technology, Centre for Materials for Electronics TechnologyInventors: Adukkadan Anil, Vattappilly Priyadarsini, Mani Iyer Sathyanarayanan, Viswanathan Kumar
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Patent number: 10683236Abstract: The present disclosure provides a glass ceramic composite electrolyte comprising gadolinium doped ceria and glass composite with desired ionic conductivity in the temperature range of 400 to 600° C., suitable for applications in solid oxide fuel cells. Also disclosed is a process for the preparation of the glass ceramic composite electrolyte.Type: GrantFiled: January 7, 2016Date of Patent: June 16, 2020Assignees: Director General, Centre for Materials for Electronics Technology, Secretary, Department of Electronics and Information Technology (DEITY)Inventors: Shrikant Kulkarni, Siddhartha Duttagupta, Vijaya Giramkar, Girish Phatak
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Patent number: 10608267Abstract: A low temperature co-fired ceramic substrate miniature fuel cell and manufacturing method therefor is disclosed. The method can be used for rapid, flexible and precise fabrication of gas distribution network as well as for a conventional membrane electrode assembly, for providing high power density. The construction results in a light weight assembly offering 5 optimum cavity for robust set-up and planar series configuration as compared to other established methods of fabrication.Type: GrantFiled: January 13, 2016Date of Patent: March 31, 2020Assignees: Secretary, Department of Electronics and Information Technology (Deity) Ministry of Communications and Information Technology, Executive Director General, Centre for Materials for Electronics TechnologyInventors: Shekhar Dimble, Shrikant Kulkarni, Ramesh Pushpangadan, Tarkeshwar Patil, Girish Phatak, Siddhartha Duttagupta
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Patent number: 10318839Abstract: Embodiments of a method for detection of plurality of three-dimensional cephalometric landmarks in volumetric data are disclosed. In some embodiments, a three-dimensional matrix is developed by stacking of volumetric data and the bony structure is segmented through thresholding. Initially a seed point is searched for initializing the process of landmark detection. Two three-dimensional distance vectors are used to define and obtain the Volume of Interest (VOI). First 3-D distance vector helps to identify Empirical Point and consecutively second gives dimensions of the VOI. Three-dimensional contours of anatomical structure are traced in the estimated VOI. Cephalometric landmarks are identified on the boundaries of traced anatomical geometry, based on corresponding Mathematical Entities. Detected landmark can be used as a Reference Point for further detection of landmarks. Estimating the VOI and detection of points continues till all desired landmarks are detected.Type: GrantFiled: January 12, 2016Date of Patent: June 11, 2019Assignees: Council of Scientific and Industrial Research, National Informatics Centre Department of Electronics and Information TechnologyInventors: Abhishek Gupta, Harish Kumar Sardana, Om Prakash Kharbanda, Viren Sardana
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Patent number: 10040714Abstract: The present invention provides a process for fabrication of ytterbium (Yb) doped optical fiber through vapor phase doping technique. The method comprises deposition of Al2O3 and Yb2O3 in vapor phase simultaneously in combination with silica during formation of sintered core layer. This is followed by collapsing at a high temperature in stepwise manner to produce the preform and drawing of fibers of appropriate dimension. The process parameters have been optimized in such a way that Al and Yb-chelate compounds can be transported to the reaction zone without decomposition and condensation of precursor materials. Thus variations of dopants concentration along the length of the preform have been minimized to <1% and good repeatability of the process has also been achieved. The resulting fibers also have smooth core-clad boundary devoid of any star-like defect. The process can be reliably adopted for fabrication of large core Yb doped optical fibers.Type: GrantFiled: March 26, 2014Date of Patent: August 7, 2018Assignees: Council of Scientific & Industrial Research, Department of Electronics and Information TechnologyInventors: Ranjan Sen, Maitreyee Saha
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Publication number: 20160380179Abstract: The present disclosure relates to piezoelectric compositions of Formula I comprising Lead Zirconate—Lead Titanate solid solution. The disclosure further relates to a method of obtaining said composition, method of preparing/fabricating piezoelectric component(s) and piezoelectric component(s)/article(s) obtained thereof. The piezoelectric composition and articles of the present disclosure show excellent electromechanical characteristics along with very large insulation resistance (IR).Type: ApplicationFiled: May 12, 2016Publication date: December 29, 2016Applicants: Department of Electronics and Information Technology, Centre for Materials for Electronics TechnologyInventors: Adukkadan ANIL, Vattappilly PRIYADARSINI, Mani Iyer SATHYANARAYANAN, Viswanathan KUMAR
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Patent number: 9054585Abstract: Embodiments of the disclosure relate to a low drop diode equivalent circuit. Piezoelectric device based vibration energy harvesting requires a rectifier for conversion of input ac to usable dc form. Power loss due to diode drop in rectifier is a significant fraction of the already low levels of harvested power. The low-drop-diode equivalent can replace the rectifier diodes and minimize power loss. The diode equivalent mimics a diode using linear region operated MOSFET. The diode equivalent is powered directly from input signal and requires no additional power supply for its control. Power used by the control circuit is kept at a value which gives an overall output power improvement. The diode equivalent replaces the four diodes in a full wave bridge rectifier, which is the basic full-wave rectifier and is a part of the more advanced rectifiers like switch-only and bias-flip rectifiers.Type: GrantFiled: March 8, 2013Date of Patent: June 9, 2015Assignees: Department of Electronics and Information Technology, Indian Institute of ScienceInventors: Bharadwaj Amrutur, Laxmi Karthikeyan
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Publication number: 20140126260Abstract: Embodiments of the disclosure relate to a low drop diode equivalent circuit. Piezoelectric device based vibration energy harvesting requires a rectifier for conversion of input ac to usable dc form. Power loss due to diode drop in rectifier is a significant fraction of the already low levels of harvested power. The low-drop-diode equivalent can replace the rectifier diodes and minimise power loss. The diode equivalent mimics a diode using linear region operated MOSFET. The diode equivalent is powered directly from input signal and requires no additional power supply for its control. Power used by the control circuit is kept at a value which gives an overall output power improvement. The diode equivalent replaces the four diodes in a full wave bridge rectifier, which is the basic full-wave rectifier and is a part of the more advanced rectifiers like switch-only and bias-flip rectifiers.Type: ApplicationFiled: March 8, 2013Publication date: May 8, 2014Applicants: Indian Institute of Science, Department of Electronics and Information TechnologyInventors: Bharadwaj Amrutur, Laxmi Karthikeyan
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Patent number: 8664994Abstract: Embodiments of the disclosure relate to an all-digital technique for generating an accurate delay irrespective of the inaccuracies of a controllable delay line. A sub-sampling technique based delay measurement unit capable of measuring delays accurately for the full period range is used as the feedback element to build accurate fractional period delays based on input digital control bits. The delay generation system periodically measures and corrects the error and maintains it at the minimum value without requiring any special calibration phase. A significant improvement in accuracy is obtained for a commercial programmable delay generator chip. The time-precision trade-off feature of the delay measurement unit is utilized to reduce the locking time. Loop dynamics are adjusted to stabilize the delay after the minimum error is achieved, thus avoiding additional jitter.Type: GrantFiled: March 8, 2013Date of Patent: March 4, 2014Assignees: Department of Electronics and Information Technology, Indian Institute of ScienceInventors: Bharadwaj Amrutur, Pratap Kumar Das