Abstract: A read circuit for an image sensor includes: a first analog-to-digital conversion unit configured to perform successive approximation high-bit analog-to-digital conversion on collected pixel data to obtain high-bit conversion data and residual pixel data; and a second analog-to-digital conversion unit electrically connected to the first analog-to-digital conversion unit and configured to perform single-slope low-bit analog-to-digital conversion on the residual pixel data to obtain low-bit conversion data, wherein a sum of a first conversion accuracy of the first analog-to-digital conversion unit and a second conversion accuracy of the second analog-to-digital conversion unit is equal to a preset conversion accuracy for the pixel data. In accordance with the read circuit, a high image conversion frame rate of the pixel data can be achieved with lower power consumption and less circuit area, and the conversion cycle of the pixel data is effectively shortened.

Abstract: The present invention discloses a pixel structure of a stacked image sensor and a preparation method thereof, by bonding processes to stack a first silicon wafer to a third silicon wafer up and down; wherein, a first photodiode array is set on the first silicon wafer located in middle, and a second photodiode array is provided on the second silicon wafer located above, and the surface of each the second photodiode in the second photodiode array is aligned and bonded correspondingly with the surface of each the first photodiode in the first photodiode array, so as to form a chip of the pixel structure of the stacked image sensor with a very deep junction depth, which is particularly suitable for near-infrared sensitization, and can effectively improve quantum efficiency in near-infrared wave bands; and by adopting a backlight technology, incident lights irradiating to photodiodes are not affected by the metal interconnect layers, both of sensitive and fill factor are high, especially for small-size pixels, whi

Abstract: A pixel processing circuit, a reading method thereof and an image sensor are provided. The pixel processing circuit includes a pixel array comprising a plurality of pixel units arranged in a Bayer array, an Analog-to-Digital Converter (ADC) module comprising a plurality of analog-to-digital converters and a plurality of switch selection modules. The analog-to-digital converters are respectively located on the opposite first side and second side of the pixel array. The switch selection modules are set between the pixel array and the analog-to-digital converters to switch the connectivity between the pixel units and the analog-to-digital converters on the opposite sides of the pixel array so that signals of green pixel units are read by first analog-to-digital converters located at the first side of the pixel array, and signals of remaining color pixel units are read by second analog-to-digital converters that are located at the second side of the pixel array.

Abstract: A tunnel operation robot includes a robot body, a walking module, a fixed wing module and a plurality of rotatable wing modules. Both sides of the robot body are provided with cantilever parts, which are collinearly arranged. The walking module is arranged on the robot body. The fixed wing module includes a fixed fan, is fixedly arranged on the robot body, and is configured to provide a pressure for the walking module to be attached to and pressed against the tunnel wall surface. The plurality of rotatable wing modules are respectively arranged on the cantilever parts on both sides of the robot body, and include a rotatable rotating fan and a wind direction adjustment driver. Each rotating fan has a rotation axis parallel to the cantilever parts and an air outlet direction perpendicular to the cantilever parts, and the wind direction adjustment driver is connected to the rotating fan.

Abstract: A surge protection circuit is presented. The surge protection circuit includes an input port for receiving an input voltage; an energy release cell having a first terminal coupled to the input port, a second terminal coupled to ground, and a control terminal coupled to the input port via a first switch device and to the ground via a second switch device. The surge protection circuit is adapted to close the first switch device to enable a current to flow from the input port to ground through the release cell upon occurrence of a positive voltage surge and to close the second switch device to enable a current to flow from ground to the input port through the release cell upon occurrence of a negative voltage surge.

Abstract: A full-face shaft tunnel boring machine system includes a tunnel boring machine cutterhead device for tunneling downwards in a shaft; a full-hydraulic formwork device for supporting and walling in a wellbore; and an upper muck-discharge system for vertically conveying rock mucks generated by tunneling. The tunnel boring machine cutterhead device comprises a vertical guide frame, a cutter-expanded boring head and an advanced cutterhead that are fixedly connected in a vertical order from top to bottom so as to form an integrated structure. The vertical guide frame is a hollow cylindrical structure and driven to rotate around an axis of the vertical guide frame by a power mechanism, and an outer wall of the vertical guide frame is provided with multiple sets of first guide rollers.

Abstract: A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

Abstract: A pixel processing circuit, a reading method thereof and an image sensor are provided. The pixel processing circuit includes a pixel array comprising a plurality of pixel units arranged in a Bayer array, an Analog-to-Digital Converter (ADC) module comprising a plurality of analog-to-digital converters and a plurality of switch selection modules. The analog-to-digital converters are respectively located on the opposite first side and second side of the pixel array. The switch selection modules are set between the pixel array and the analog-to-digital converters to switch the connectivity between the pixel units and the analog-to-digital converters on the opposite sides of the pixel array so that signals of green pixel units are read by first analog-to-digital converters located at the first side of the pixel array, and signals of remaining color pixel units are read by second analog-to-digital converters that are located at the second side of the pixel array.

Abstract: A read circuit for an image sensor includes: a first analog-to-digital conversion unit configured to perform successive approximation high-bit analog-to-digital conversion on collected pixel data to obtain high-bit conversion data and residual pixel data; and a second analog-to-digital conversion unit electrically connected to the first analog-to-digital conversion unit and configured to perform single-slope low-bit analog-to-digital conversion on the residual pixel data to obtain low-bit conversion data, wherein a sum of a first conversion accuracy of the first analog-to-digital conversion unit and a second conversion accuracy of the second analog-to-digital conversion unit is equal to a preset conversion accuracy for the pixel data. In accordance with the read circuit, a high image conversion frame rate of the pixel data can be achieved with lower power consumption and less circuit area, and the conversion cycle of the pixel data is effectively shortened.

Abstract: A method and a system for reducing column noise of an image sensor are provided. The method includes: reading dark pixel data in each image frame and reading initial effective pixel data in each image frame, where dark pixels and initial effective pixels are both arranged in N columns; sequentially calculating the dark pixel data to obtain an average value of each column of dark pixels and an entire average value of the dark pixels in each image frame; obtaining a corrected value of each column according to the average value of each column of dark pixels and the entire average value of the dark pixels; and calculating the corrected value of each column and the corresponding initial effective pixel data in each image frame to obtain target effective pixel data. In the method, the dark pixel data is pre-processed.

Abstract: A time-interleaved circuit includes an input buffer, a plurality of track-and-hold circuits, and a plurality of isolation inductors. The input buffer is configured to receive an input signal having an input voltage and to output an output signal having an output voltage. The track-and-hold circuits are electrically coupled in parallel with each other. Each track-and-hold circuit is electrically coupled in series with the input buffer. Each isolation inductor is electrically coupled to the output of the input buffer and at least one of the track-and-hold circuits.

Abstract: A piecewise linear gain amplifier circuit includes a differential preamplifier and a plurality of transconductors. The differential preamplifier is electrically coupled to a differential input having an input voltage. The transconductors are electrically coupled in parallel with each other. Each transconductor includes a respective differential input that is electrically coupled to a differential output of the differential preamplifier. In addition, each transconductor includes a respective differential output that is electrically coupled to a common differential PWL output. Each transconductor has a different linear input range. An optional attenuation circuit can be electrically coupled in parallel to the differential preamplifier. The differential output of the attenuation circuit can be electrically coupled to a differential input of another transconductor, and that transconductor can have a differential output that is electrically coupled to the common differential PWL output.

Abstract: A method and system for secure communications includes obtaining at a first device and a chief device signals based on movement of at least one of the devices between them. Both the first device and chief device convert the signals into identical first secret keys which are then stored. The method and system next includes obtaining at a second device and a chief device signals based on movement between them of at least one of the devices. Both the second device and chief device convert the signals into identical second secret keys which are then stored. The chief device then encrypts first secret key with second secret key and transmits to the second device which decrypts it with its copy of second secret key obtaining first secret key. These communicating devices can then transmit data between them securely encrypted and decrypted with the first secret key.

Abstract: The internal operational state of wellhead equipment and downhole activity can be monitored with a sensor device mounted or mountable on the wellhead equipment. The sensor can include more than one vibration sensor, a sensor communications device, and a processor. The vibration sensor generates sensor signals in response to vibrations of the wellhead equipment caused by changes in the internal operating state of the wellhead equipment or downhole activity. The processor generates sensor data based on the generated electronic sensor signals. The sensor communication device transmits an electronic data signal for the sensor data via a communications network to a user device, which may be located remotely from the wellhead equipment. The user device can output a report including an audible or visible representation of the transmitted sensor data. In some embodiments, the sensor device can be retrofit to existing equipment and systems.

Abstract: Methods and systems for generating illumination modulation signals, image intensifier gain modulation signals, and image sensor shutter control signals in a three-dimensional image-capturing system with one or more frequency synthesizers is disclosed. The illumination modulation signals, image intensifier gain modulation signals, and image sensor shutter signal are all coherent with one another, being derived from a common clock source. The use of frequency synthesizer concepts allow for the use of rapid modulation phase changes for homodyne operation, and further allow the use of rapid modulation frequency changes to mitigate the effects of inter-camera interference.

Abstract: An analog-to-digital conversion (ADC) system is operated with a duty cycle. During the ON period, the ADC circuits perform analog-to-digital conversions of an analog input signal. During the Standby period, the ADC system is in either a standby state or a foreground calibration state. The ADC system operates in a reduced-power mode in the standby state. In the foreground calibration state, the ADC system performs a portion of a foreground calibration cycle during a calibration time slot. The foreground calibration cycle is performed over multiple calibration time slots. The foreground calibration cycle and the calibration time slots are configurable by changing the values of control registers that represent calibration parameters.

Abstract: A multipath sampling circuit includes an input line electrically having an input voltage, a plurality of voltage amplifiers in parallel electrically with one another, each voltage amplifier having a respective input electrically coupled in series with the input line, each voltage amplifier having a different gain and a different saturation voltage; and a plurality of track-and-hold circuits. The track-and-hold circuits have a first state in which a respective input of each track-and-hold circuit is electrically coupled to an output of a respective amplifier. The track-and-hold circuits have a second state in which the respective input of each track-and-hold circuit is electrically decoupled from the output of the respective amplifier. The track-and-hold circuits can be electrically coupled to a summing circuit, a buffer amplifier, or an operational amplifier.

Abstract: A method, non-transitory computer readable medium and device that minimize error conditions with substantially simultaneously and independently generated secret keys includes synchronizing with a mobile device configured to execute a corresponding key generation process. Data obtained based on at least one shared characteristic with the synchronized mobile device is converted into a plurality of binary numbers. At least one bit for each of the plurality of binary numbers which are at least measurably random is identified. An error condition with any of the determined bits for the plurality of binary numbers is identified. At least a portion of the determined bits for the plurality of binary numbers without the detected error condition are selected. A key is generated based on the selected determined bits for the plurality of binary numbers for use in securing communications with the synchronized mobile device.

Abstract: A time-interleaved circuit includes an input buffer, a plurality of track-and-hold circuits, and a plurality of isolation inductors. The input buffer is configured to receive an input signal having an input voltage and to output an output signal having an output voltage. The track-and-hold circuits are electrically coupled in parallel with each other. Each track-and-hold circuit is electrically coupled in series with the input buffer. Each isolation inductor is electrically coupled to the output of the input buffer and at least one of the track-and-hold circuits.

Abstract: A three-dimensional imaging system includes an image intensification subsystem and an illumination subsystem that are both capable of operating with sinusoidal or pulsed waveforms in accordance with phase-measuring or flash modes of operation, respectfully, of the three-dimensional imaging system.