Abstract: A clock generates clock pulses defining a plurality of clock cycles. A circuit is connected to receive the clock pulses and measure a primary time of occurrence of an event with respect to a clock cycle. Logic circuits are provided to generate a timing pulse representing a time interval between the event and a clock pulse of the subsequent clock cycle. The timing pulse begins at the time of the event and ends on the occurrence of a subsequent clock pulse. A filter circuit receives the timing pulse and generates in response thereto a signal having an amplitude representing the duration of the timing pulse. The amplitude is measured to determine the width of the timing pulse thereby identifying the occurrence of the event with respect to a subsequently occurring clock pulse.