Patents Assigned to Diseno de Sistemas en Silicio, S.A.
  • Publication number: 20100289595
    Abstract: Which permits the application of methods for increasing the performance of a communications system on a medium made up of N conductors (21 to 2N) and a reference plane (4) by means of injecting signals (11 to 1N) inductively in up to N combinations of the conductors, including injection in common mode (11), such that said injected signals can be made to be orthogonal to each other.
    Type: Application
    Filed: September 26, 2008
    Publication date: November 18, 2010
    Applicant: DISENO DE SISTEMAS EN SILICIO, S.A.
    Inventors: Jorge Vicente Blasco Claret, Jose Luis Gonzalez Moreno, Jose Maria Vidal Ros
  • Publication number: 20100264886
    Abstract: Which permits the application of methods for increasing the performance of a communications system on a medium made up of N conductors (51-5N) and a reference plane (6) by means of injecting voltage signals (41-4N) in up to N combinations of the conductors, including injection in common mode, such that said injected signals can be made to be orthogonal to each other.
    Type: Application
    Filed: September 26, 2008
    Publication date: October 21, 2010
    Applicant: DISENO DE SISTEMAS EN SILICIO, S.A.
    Inventors: Jorge Vicente Blasco Claret, Jose Luis Gonzalez Moreno, Jose Maria Vidal Ros
  • Publication number: 20100233954
    Abstract: Single-port signal repeater. The repeater is connected in parallel to the communication means (3), on which only one point of access (5) is needed. The repeater (4) comprises an amplifier, a hybrid circuit and a resupply and increases the scope and transmission capacity for communications made on a medium controlled without the disadvantages of the standard repeaters, which have to interrupt the line and need two access points to the channel.
    Type: Application
    Filed: June 10, 2008
    Publication date: September 16, 2010
    Applicant: DISENO DE SISTEMAS EN SILICIO, S.A.
    Inventors: Jorge Vicente Blasco Claret, Jose Luis Gonzalez Moreno, Jose Luis Camps Soriano, Antonio Pairet Molina
  • Patent number: 7483365
    Abstract: This permits the transmission of signals over the electricity network in such a way that the spectral density of power is adjusted to the regulations in the current rules by means of the possibility of introducing notches in transmission in an efficient manner. It is characterised by the adjustment of the power in one or more carriers of an OFDM signal for generating these notches, through the use of IDFTs of at least 1024 points (if the IDFT is complex) or at least 2048 points (if the IDFT is real) and through the use of a window to multiply the symbols to be transmitted in time.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: January 27, 2009
    Assignee: Diseno de Sistemas en Silicio, S.A.
    Inventors: Jorge Vicente Blasco Claret, Juan Carlos Riveiro Insúa, Salvador Iranzo Molinero, Luis Manuel Torres Cantón, José Abad Molina
  • Patent number: 7483435
    Abstract: The invention describes a data transmission method for a multi-user. multipoint-to-multipoint digital data transmission system involving a plurality of users equipment (1) which are bidirectionally connected via physical medium (6). The method is intended to communicate one (1a) user to several (1b-1d) users equipment at different speeds, sending multiple frames, maintaining the bandwidth and maximum latency values required by each destination user (1b-1d). Further, this method consists in using the percentage reserve of the frame, providing a quality of service based on that required by the user equipment and supplying a criterion for dynamically assigning the packets sent to each user equipment in the frame, grouping or dividing them.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: January 27, 2009
    Assignee: Diseno de Sistemas en Silicio, S.A.
    Inventors: Jorge Vicente Blasco Claret, Juan Carlos Riveiro Insúa, Judit Carreras Areny, David Ruiz López
  • Patent number: 7460553
    Abstract: This process applies to a number of user kits (A, B, . . . X) and a head-end kit (1) communicating over the electricity network (2) using an upstream channel and a downstream channel. In essence, the process comprises accessing by multiple user kits (A, B, . . . X) in the upstream channel and the sending of multiple information frames by the head-end (1) in the downstream channel simultaneously applying OFDMA/TDMA/CDMA multiplexing and dynamically assigning each carrier so as to maximize transmission capacity in both the upstream and downstream channels. In turn, the process allows the adjustment of the quality of service according to the type of information and the user that requires the transmission and the dynamic allocation of bandwidth through constantly calculating the signal-to-noise ratio.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: December 2, 2008
    Assignee: Diseno De Sistemas En Silicio, S.A.
    Inventors: Juan Carlos Riveiro Insua, Jorge Vicente Blasco Claret, FelicianoS Gómez Martínez, David Ruiz López, Nils Hakan Fouren, Luis Manuel Torres Cantón, Francisco Javier Jiménez Marquina, Carlos Pardo Vidal
  • Patent number: 7433428
    Abstract: This method reduces the variance of the estimation of the signal-to-noise rate in a multiuser digital communications system. These communications require a sending of a phase reference symbol prior to sending a information, where the estimation is made of the signal-to-noise rate in order to use a modulation with a maximum number of bits per symbol, maintaining a bit error probability in reception within certain given margins. The method minimizes and equalizes the variance of the samples obtained for the different values, even and odd of bits per carrier, which the system uses. The estimation is necessary for selecting the number of bits per carrier in order to be adapted to the channel and as back-up information in the event of using a receiver with diversity.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: October 7, 2008
    Assignee: Diseno de Sistemas en Silicio, S.A.
    Inventors: Jorge Vicente Blasco Claret, Juan Carlos Riveiro Insúa, Agustín Badenes Corella
  • Patent number: 7251114
    Abstract: The invention relates to an overvoltage protection circuit comprising an MOV (Metal Oxide Varistor) voltage limiting device (3) which is disposed in series with a GDT (Gas Discharge Tube) voltage limiting device (4). The invention is characterized in that a resistor (5) is disposed in parallel with the aforementioned GDT device (4), the value of said resistor being such that the voltage supported by the GDT device (4) is less than the holdover voltage thereof. In another embodiment of the invention, a second resistor (6) is disposed in parallel with the MOV device (3) and, together with the above-mentioned resistor (5), forms a resistive divider such that the voltage applied the GDT device (4) under steady-state conditions is less than the holdover voltage of the GDT.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: July 31, 2007
    Assignee: Diseno de Sistemas en Silicio, S.A.
    Inventors: Jorge Vicente Blasco Claret, Antonio Poveda Lerma, Antonio Pairet Molina, José Luís González Moreno, Francisco Andrés Navarro