Abstract: The apparatus and method invented are operating upon a digital image signal obtained from an image sensor. The sensor is covered with different colored filters and is only able to record the color transmitted through each specific filter into the photosite or pixel. This type of sensor is known as a color filter array or CFA sensor. The different colored filters are arranged in a predefined pattern across the sensor. To obtain a full color image the missing color information is estimated by a set of weighed values obtained by an inverted gradient function. The set of weighted values is found from the neighboring pixels in the four compass directions, north, east, west and south or is found horizontally and vertically. The surrounding pixels are corrected by the chrominance channel to better fit the center pixel in the luminance channel, prior to using the gradient functions.

Abstract: A pixel image sensor has an isolation barrier and diffusion well connected to a biasing voltage to prevent substrate charge leakage caused by photoelectrons generated in the substrate beneath a photon sensing area of the pixel image sensor from drifting to a storage node. An opaque metallic silicide layer is deposited on and a metal shield is fabricated above the storage node and storage node control transistor switches to prevent light from impinging on the storage node and storage node control transistor switches and thus preventing generation of photoelectrons at the storage node and storage node control transistor switches. A guard ring surrounds the photo sensing area, the storage node, and the storage node control transistor switches and is in contact with the biasing voltage and reduces cross-talk from photoelectrons drifting from adjacent image sensors.

Abstract: An active pixel sensor circuit comprising a photodiode, a storage node, and a transfer gate between the photodiode and storage node, where the potential barrier between the photodiode and the storage region is maintained during charge accumulation, thereby preventing charge tunneling between the photodiode and the storage region. This is achieved by electrically connecting the transfer gate, which controls charge transfer between the photodiode and the storage region, to the storage region. Connecting the transfer gate to the storage region maintains the potential barrier between the photodiode and the storage region at a threshold voltage during the charge integration period which prevents charge tunneling between the photodiode and the storage node. The threshold voltage is determined by the implant levels used to form the active pixel sensor and can be optimized by using optimum implant levels. This prevention of charge tunneling between the photodiode and the storage node eliminates image lag.

Abstract: An apparatus and method for automatically focusing a miniature digital camera module (MUT) is described. A MUT is loaded onto a test fixture and aligned with an optics system of a test handler. Focus targets contained within two target wheels are positioned over an optical centerline above the digital camera module using stepper motors. A field lens is positioned to focus an image of the targets onto the lens opening of the MUT. The image can be of a single target or a combination of targets contained on the target wheels at various optical distances from the MUT. A focusing unit adjusts the lens cap of the MUT for a best focus setting and after the MUT has been tested the best focus setting if physically fixed by permanently connecting the lens cap to the body of the MUT.

Abstract: A pixel circuit with a dual gate PMOS is formed by forming two P+ regions in an N? well. The N? well is in a P? type substrate. The two P+ regions form the source and drain of a PMOS transistor. The PMOS transistors formed within the N? well will not affect the collection of the photo-generated charge as long as the source and drain potentials of the PMOS transistors are set at a lower potential than the N? well potential so that they remain reverse biased with respect to the N? well. One of the P+ regions used to form the source and drain regions can be used to reset the pixel after it has been read in preparation for the next cycle of accumulating photo-generated charge. The N? well forms a second gate for the dual gate PMOS transistor since the potential of the N? well 12 affects the conductivity of the channel of the PMOS transistor. The addition of two NMOS transistors enables the readout signal to be stored at the gate of one of the NMOS transistors thereby making a snapshot imager possible.

Abstract: A method for a fast color saturation control of digital color images using one color saturation factor has been achieved. Said method can be performed in any color space having three primaries as e.g. the R-G-B or in the CMY color space without the requirement to convert all the pixels of said color image into another color space as e.g. HSI to perform the color saturation control. Thus a significant computational effort for the conversion of the pixels from one color space into another and back can be avoided. Saving computational effort saves time and reduces the electrical power consumption. Right after the color saturation control process the corrected images can be viewed, if the colors are not satisfactory the process can be easily repeated using a modified color saturation factor. Said method can be used for new pictures taken by a digital camera as well as for downloaded pictures from any source. Additionally said method of color saturation control can be combined with a color correction process.

Abstract: A pixel for detecting red and green light is a single pixel is described. The pixel comprises a deep N well formed in a P type epitaxial substrate. The pixel comprises a deep N well formed in a P type epitaxial substrate. A number of P wells, which are used as the sensor nodes, are formed in the deep N well. The use of these P wells as the sensor nodes improves the modulation transfer function. The depth of the deep N well is about equal to the depth of hole electron pairs generated by red light in silicon. The depth of the P wells is about equal to the depth of hole electron pairs generated by green light in silicon. A red/green signal is determined at each P well by determining the potentials between each of the P wells and the deep N well after a charge integration cycle with the P wells and the deep N well isolated.

Abstract: A test system and a related method to perform optical and electrical tests, to adjust the focus and to seal the lens of digital fixed-focus cameras have been achieved. Said test system is especially suited for miniature camera module to be built into consumer electronic devices as mobile phones, PDAs, etc. Said test system comprises three parts, a control system, an auto-focus head, and a XYZ robot. Said auto-focus head executes the adjustment of the focus, identifies hot pixels and black level, tests the saturation level, identifies cold pixels, tests dust particles and white, blue, red, and infrared color levels. As last step the auto-focus applies glue to fix the focused lens of the camera module. Said XYZ robot performs is moving the camera modules to be tested in XY direction and is approaching the lens system of the auto-focus head in Z direction. Said control system has interfaces to both, XYZ robot and auto-focus hand and is comprising interfaces and a frame grabber.

Abstract: A multi-processing unit reduces the time to compute parameters of a digital image to by the number of computers operating in the parallel. An image of a digital picture taken during a test of a digital camera module is portioned into N independent portions and each portion is stored into one of N memories. N processors compute test parameters of the image, where each processor works independently on a portion of the image and in parallel with the other processors. The serial computational content of the image is zero allowing a speed-up of the multiprocessing unit to be N with respect to the running the entire computation on a single processor.

Abstract: A method and a system for an automatic white balancing of color images being exposed to different illuminants have been achieved. The color information from the sensor color channels is measured and averaged over all pixels belonging to each of the colors of the color array used. The result is equivalent to what color a 1-pixel camera would see if pointed to the same scene. From this “statistical pixel” the ratios of the colors involved are calculated. Pictures taken in different illuminants as e.g. daylight, fluorescent light or incandescent light can then be separated due to their location in different categories in a space defined by said ratios of the colors involved. Each category has predefined white balance factors, which are applied to the image now.

Abstract: An imaging method and system that flexibly accesses light sensor elements and processes imaging signals. The imaging system comprises an array of pixel sensor cells, an array controller and a readout control circuit. The imaging system provides color interpolation.

Abstract: A video imaging system includes an imaging array having a plurality of picture elements (pixels) formed in a substrate. An analog to digital converter formed in the substrate converts signals from the pixels into digital pixel signals. A defect detection circuit formed in said substrate provides a defective pixel output signal indicating, as the digital pixel signal corresponding to the pixels is processed, if any one pixel of the plurality of pixels in the imaging array is defective. The video imaging system includes a defect substitution circuit, also formed in the substrate, that substitutes a corrected pixel for any defective pixel. The video imaging system is responsive to a gain control signal to adjusts the pixels in magnitude. The gain control signal is applied to the first circuit to control the analysis of the pixel to determine if it is defective.

Abstract: A pixel circuit with a dual gate PMOS is formed by forming two P+ regions in an N? well. The N? well is in a P? type substrate. The two P+ regions form the source and drain of a PMOS transistor. The PMOS transistors formed within the N? well will not affect the collection of the photo-generated charge as long as the source and drain potentials of the PMOS transistors are set at a lower potential than the N? well potential so that they remain reverse biased with respect to the N? well. One of the P+ regions used to form the source and drain regions can be used to reset the pixel after it has been read in preparation for the next cycle of accumulating photo-generated charge. The N? well forms a second gate for the dual gate PMOS transistor since the potential of the N? well 12 affects the conductivity of the channel of the PMOS transistor. The addition of two NMOS transistors enables the readout signal to be stored at the gate of one of the NMOS transistors thereby making a snapshot imager possible.