Patents Assigned to Dialog Semiconductor (UK) Limited
  • Patent number: 9559597
    Abstract: A power converter has a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the power converter, and an auxiliary winding is configured to detect an open connection fault of the auxiliary winding. The power converter includes a current source coupled to the auxiliary winding that, when activated, supplies a current to the auxiliary winding. A controller measures a voltage across the auxiliary winding. Responsive to detecting an increase in the voltage across the auxiliary winding while the current source is activated, the controller disables the power converter.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: January 31, 2017
    Assignees: Dialog Semiconductor Inc., Dialog Semiconductor (UK) Limited
    Inventors: Andrey Malinin, Tino Lin, Jiandong Zhang, John Kesterson, Qiu Sha
  • Patent number: 9559587
    Abstract: The present document relates to DC/DC converters with a modular structure for providing different levels of output currents. A power converter configured to convert electrical power at an input voltage into electrical power at an output voltage is described. The power converter comprises inverter stages with half bridges comprising a high side switches and low side switches which are arranged in series between the input voltage and a reference voltage; and with high side drivers for providing drive signals for the high side switches, subject to a high side control signals at a drive voltage level. In addition, the power converter comprises a level shifting unit configured to convert a high side control signal at a logic voltage level into the high side control signal at the drive voltage level for driving the high side switches.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: January 31, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Francesco Dalena, Enrico Pardi, Stefano Scaldaferri
  • Patent number: 9547323
    Abstract: An LDO circuit with a current sink stage reduces significantly overshooting of the output voltage due to sudden changes of output current. The activation of the current sink stage is independent of the overshoot percentage of the regulated output voltage. The disclosure doesn't require large output capacitors to avoid the possibility of brownouts of chips supplied by the LDO.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: January 17, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Ambreesh Bhattad
  • Patent number: 9541933
    Abstract: The present document relates to voltage regulators. In particular, the present document relates to a method and a corresponding voltage regulator with improved performance subject to load transients. A regulator configured to provide a load current at an output voltage in dependence of an input voltage is described. The regulator comprises a core regulator configured to provide a core current at a core output voltage in dependence of the input voltage. Furthermore, the regulator comprises current sensing means configured to provide an indication of the core current. The output voltage is dependent on the core output voltage and on a voltage drop at the current sensing means. In addition, the regulator comprises a current source configured to provide an auxiliary current based on the indication of the core current. The load current is dependent on the core current and on the auxiliary current.
    Type: Grant
    Filed: November 22, 2014
    Date of Patent: January 10, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Horst Knoedgen, Frank Kronmueller
  • Patent number: 9537396
    Abstract: The present document relates to Direct Current (DC) to DC power converters. In particular, the present document relates to DC to DC power converters which comprise one or more bipolar transistors as power switches. A control circuit configured to control a power switch of a switched-mode power converter is described. The power switch comprises a bipolar transistor. The control circuit is configured to determine an indication of a time instant, at which the power switch is switched off; and to adjust a basis current for controlling the power switch based on the determined indication of the time instant.
    Type: Grant
    Filed: November 22, 2014
    Date of Patent: January 3, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Horst Knoedgen
  • Patent number: 9531260
    Abstract: An apparatus and a method for generating a pulse width modulated, PWM, voltage doubler signal is presented The apparatus comprises a voltage source, a capacitor, an output node, a switchable circuit assembly for connecting the voltage source, the capacitor and the output node, and a controller for the switchable circuit assembly which is adapted to be switchable between a first circuit configuration in which the capacitor is connected in parallel to the voltage source so as to be chargeable by the voltage source, and a second circuit configuration in which the capacitor is connected in series between the voltage source and the output node, and wherein the control means is adapted to control the switchable circuit assembly to switch to the first circuit configuration in the first period, and to switch to the second circuit configuration in the second period.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: December 27, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Horst Knoedgen, Gary Hague
  • Patent number: 9532427
    Abstract: This application relates to a lighting system comprising a plurality of light emitting diode, LED, circuits, and a power source for providing a drive voltage to the plurality of LED circuits. For each LED circuit, the lighting system comprises a first variable resistance element connected between the respective LED circuit and ground, and a first feedback circuit configured to control a voltage at a first node between the respective LED circuit and the respective first variable resistance element to a first voltage. The lighting system further comprises a current source and a second variable resistance element connected between the current source and ground, wherein each first variable resistance element is configured to attain a resistance value depending on a resistance value attained by the second variable resistance element.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: December 27, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Fulvio Schiappelli, Jiri Ledr, Alessandro Angeli, Andrea Acquas
  • Patent number: 9520788
    Abstract: An apparatus and method for a multi-phase switch regulator with improved efficiency is disclosed. The device has parallel implementations for the different phases comprising a driver, a current sense variable gain amplifier, a current share circuit, a pulse width modulation (PWM) control circuit, a trim network, and an inductor. A method is disclosed of providing a system with current sharing function comprising a driver circuit, a current sense circuit, a current share circuit, a PWM control circuit and a trim circuit, providing a current sense circuit for each segment of a driver circuit, sensing a signal using a current sense circuit for each segment of a driver circuit, comparing the output of the current sense circuit, providing the current error information to a PWM controller, generating a PWM drive signal of each phase, and finally, equalizing the output of the current sense amplifier. Other methods that utilize dummy output stages and low pass filter feedback is disclosed.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: December 13, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Hidenori Kobayashi
  • Patent number: 9513870
    Abstract: Simultaneous results of modulo7 and modulo9 operations on an unsigned binary number N are achieved by dividing N by a number d, d being power of 2 then the resulting quotient and remainder are used to calculate modulo 7 and modulo9 by repeatedly split-and accumulate operations. The solution allows shared use of a significant amount of logic components, by a scalable architecture modulo7 and modulo9 can be found on large numbers and allows flexible use if only modulo7 or only modulo9 calculation is required.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: December 6, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Stanly Jacob
  • Patent number: 9509205
    Abstract: DC-DC current mode switching power converters that have negative current capability are presented. The power converters comprise: an output node, a pass device connected to the output node of the power converter, the pass device being configured to operate in accordance with a PWM signal and to supply at least a portion of an output current of the power converter, a PWM comparator for generating the PWM signal for controlling operation of the pass device in accordance with a current conducted by the pass device and a difference between an output voltage of the power converter and a reference voltage. The converters have push pull class B (or AB) current sensing, dynamic biasing of a current sense amplifier using error information, and using operational transconductance amplifiers that are fed an error voltage. This results in a lower quiescent current at zero load.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: November 29, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Pietro Gabriele Gambetta
  • Patent number: 9501605
    Abstract: This application relates to a method of routing circuit paths of an integrated circuit, IC. The IC comprises a plurality of circuit elements and a plurality of circuit paths connecting the circuit elements. The method comprises steps of: receiving a representation of the IC, comparing, based on the representation, the circuit elements of the IC against a set of reference circuit elements, classifying the circuit paths of the IC into a plurality of categories based on a result of the comparison, and routing the circuit paths of the IC in accordance with their respective categories. The application further relates to a computer-readable storage medium comprising a computer program that makes a computer perform the steps of said method when executed and to an apparatus for routing circuit paths of an IC.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: November 22, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Wolfgang Embacher
  • Patent number: 9501080
    Abstract: A multiple output comparator compares a first input signal and a second input signal. An output mirror circuit receives the comparison and sets an output signal at a first output terminal of the multiple output comparator to a digital state indicating that the magnitude of the is greater than or lesser than the second signal. An offset generator creates an offset signal for adjusting a threshold signal level at the output mirror circuit such that the difference of the and the second signal is combined with the offset signal. The output mirror circuit transfers provides a digital state to another output terminal indicating that the is greater than or lesser than the second signal as adjusted by the adjustment signal.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: November 22, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Mark Childs
  • Patent number: 9484899
    Abstract: A debounce circuit eliminates noise, glitches, or transient signal variations resulting from mechanical bounce occurring at a change of state of analog signals and provides a dynamic debounce period alteration and time base variation without loss of the current debounce state. The debounce circuit has a physical counter that is configured for being adjusted within a virtual counter such that the noise, glitches, or transient signal variations resulting from mechanical bounce occurring at an initiation of a change of state of an analog input signal from a source device are filtered by delaying a change of output state of the debounce circuit. The debounce circuit includes a strobe generator that produces a strobe signal that is a submultiple of a master clock that is determined by the location of the physical counter within the virtual counter that is used to increment the physical counter within the virtual counter.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: November 1, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Philip Todd
  • Patent number: 9477252
    Abstract: A voltage regulator, which contains a circuit to determine its output power. It has an output node providing an output voltage for a load; current sensing means for sensing an output current flowing at the output node; voltage providing means for providing a digital representation of the output voltage or of an input voltage to the voltage regulator; output power determination means comprising a digitally controllable variable resistance circuit receiving the digital voltage representation from the voltage providing means and generating a resistance, wherein the variable resistance circuit is connected to the current sensing means to obtain a signal that depends upon the output current and generates a voltage depending on the generated resistance and the obtained signal; and the output power determining means are adapted to determine the output power of the voltage regulator based on the voltage generated by the variable resistance circuit.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 25, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Pietro Gabriele Gambetta
  • Patent number: 9471077
    Abstract: Compensation capacitor voltages of DC-to-DC converters are pre-set without switching to enable smooth transition from sleep mode to active mode. Appropriate compensation capacitor voltages are set regardless of the length of no-switching sleep period or input voltage change. Therefore the converter can always start with appropriate error amplifier and duty conditions, and avoid output voltage disturbance when the PWM control loop takes over in active mode the control of buck converter. The appropriate capacitor voltages are enabled by creating a local PWM feedback loop of a PWM control loop without enabling the output stage. This local PWM feedback loop works intermittently and always sets the appropriate voltage for the error amplifier and compensation capacitor.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: October 18, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Hidenori Kobayashi
  • Patent number: 9471071
    Abstract: An apparatus, system, and method for a voltage regulator for improved voltage regulation using a remote feedback and remote feedback low pass filter. The system comprises of a power management unit, a remote load point (HOST), an inductor, a filtering capacitor, a printed circuit board (PCB) track output net, a ground connection, a remote feedback line, and a low pass filter (LPF). In this present disclosure, the electrical connection of the remote feedback low pass filter to the output filter capacitor minimizes transient ringing, reduced noise coupling, and improved system stability.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: October 18, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Pietro Gallina
  • Patent number: 9474120
    Abstract: A controller for a driver circuit of a solid state lighting (SSL) device is described. The driver circuit comprises a power converter to transfer energy from AC mains voltage to the SSL device. The controller determines a dim level for the SSL device. The controller also determines a synchronization signal by comparing a voltage derived from the input voltage with a pre-determined threshold. The controller determines a sequence of PWM pulses based on the synchronization signal. The controller operates the power converter in a first operation mode for supplying energy to the SSL device at a first energy level within the sequence of PWM pulses, and operates the power converter in a second operation mode in between the PWM pulses. The second energy level is lower than the first energy level and the first energy level and/or a width of the PWM pulses depend on the dim level.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 18, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Julian Tyrrell, Sander Heuvelmans, Nebojsa Jelaca, Gary Hague
  • Patent number: 9471084
    Abstract: An apparatus and method for a bandgap voltage reference circuit with improved operation for a low voltage power supply. A bandgap voltage reference circuit which is operable at low power supply voltage for power supplies of 1.3V comprising of a first npn bipolar transistor, a second npn bipolar transistor, a third npn bipolar transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, and a first, second and third p-channel MOSFET. The matched second resistor and third resistor, and the first and third npn bipolar transistor pair establishes a ?Vbe dependent current (a PTAT current), and the fourth resistor established a ?Vbe to establish a bandgap voltage of approximately 1.2V.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: October 18, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Hidenori Kobayashi
  • Patent number: 9461487
    Abstract: A reconfigurable multi-battery pack system for inclusion in a hand held device for more efficiently energizing battery powered operation of both a buck DC-DC converter and a boost DC-DC converter included in the device. Also disclosed is a power management circuit that autonomously: 1. connects the batteries in parallel during battery recharging; and 2. connects at least two (2) of the batteries in series when the batteries are not being recharged and are energizing operation of the DC-DC converters.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: October 4, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Sorin Laurentiu Negru
  • Patent number: 9455710
    Abstract: A clock enabling circuit for providing a gated clock signal in response to receiving clock request information is presented. The clock enabling circuit comprises a clock request input, a clock input, and a flip-flop stage. It also includes a first sub-circuitry comprising a first input being coupled with the clock request input and an output being coupled with the flip-flop stage for providing a set information to the flip-flop stage in response to the receipt of the clock request information, the flip-flop stage being configured to provide a clock enabling information in response to receiving the set information and a second sub-circuitry comprising a first and a second input, the first input being coupled with the clock input and the second input being coupled with the flip-flop stage, the second sub-circuitry comprising an output for providing the gated clock signal in response to receiving the clock enabling information.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: September 27, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Joachim Riexinger, Armin Fischer