Abstract: This demodulator for signals transmitted by bursts of data packets and the corresponding method comprise receiving from a separate processor identifiers of bursts to be processed, filtering the signals to retrieve the bursts whose identifiers were received, processing said retrieved bursts, receiving from said separate processor timing information associated with the identifiers of bursts to be processed; and power management to drive at least some components of said demodulator between an idle state and an active state depending upon said timing information.

Abstract: A method for receiving a signal including bursts of data transmitted over several channels, includes determining (6) a reference channel and receiving (8) the bursts from the reference channel, characterized in that it also includes monitoring (10) faults in the reception of the data from the reference channel and on detection of a fault, receiving (14) the same data from another channel.

Abstract: The invention concerns the decryption of encrypted data using a host-processor and a co-processor. The method for decrypting data using the host-processor and at least one co-processor. The method comprises the step of providing the host-processor with a set of encrypted coherent data. The encrypted data is segmented into segments by the host-processor. The co-processor is provided with a first part of the segments from the set, decrypting the first part of the segments. The host-processor decrypting a second part of the segments from the set and delivering decrypted data comprising a combination of the decrypted first and second parts.

Abstract: A method of managing the storing of data packets into storage space of a buffer, in which each data packet is constituted of at least two data blocks includes the steps of receiving (40) the data blocks of a current data packet and writing (42) in free storage space of the buffer the data blocks of the current data packet as received. If there is not enough free storage space in the buffer (12) for writing a received data block of the current data packet, the method continues with ceasing (48) to write received data blocks of the current data packet, and defining (48) at least one written data block of the current data packet as free storage space, so that received data blocks of a next data packet can be written over the written data blocks of the current data packet. The method has application to digital television reception.

Abstract: The invention concerns controlling automatic gain control for a digital signal receiver. The method includes receiving a digital feedback signal for controlling an amplifier and processing the digital feedback signal to deliver a driving signal to an analog amplifier. Processing the digital feedback signal comprises regulating the evolution of the driving signal so that it is maintained constant during a predetermined period of time after every change.

Abstract: This invention concerns a method for receiving a data stream comprising data sections spread on data packets. An error correction code is associated with and transmitted with every data section. The method comprises the steps of receiving the packets of the data stream by an interface module and transmitting the data stream, packet-by-packet, from the interface module to a processing module. The method also comprises that upon reception of data by the interface module, incrementally computing an error correction code for the current data section and when the entire section has been received, verifying the incrementally computed error correction code to deliver a section validity indicator.

Abstract: A wireless signal amplification system including amplification apparatus (6) consisting of numerous different amplifiers (61 to 6n) which are distributed in an analogue processing chain (4). Also, a converter (12) for converting analogue signals into digital signals which, at input, are connected to the outlet of the analogue processing chain (4) and, at output, are connected to at least the gain control circuit (16) of the amplification apparatus (6) according to a value that is representative of a characteristic of the wireless signal (1). In this way, sampling of the wireless signal (1) by the converter (12) is optimized. The gain control circuit (16) establishes an average gain control signal (18), and also has, for each of the amplifiers (61 to 6n), a device for calculating an individual gain control signal (20i to 20n) according to a transfer function (H1 to Hn) which is specific to each amplifier and which is applied to the average gain control signal.