Patents Assigned to DIDREW TECHNOLOGY (BVI) LIMITED
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Publication number: 20220302010Abstract: An interposer structure is provided that can be used in semiconductor packaging to electrically connect a printed circuit board to a plurality of die. The interposer structure contains a high-density silicon-less link chiplet that is laterally surrounded by, and embedded in, a lower-density redistribution layer interposer.Type: ApplicationFiled: March 22, 2021Publication date: September 22, 2022Applicant: DIDREW TECHNOLOGY (BVI) LIMITEDInventor: Minghao SHEN
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Patent number: 10913254Abstract: In debonding a temporarily adhesive-bonded carrier-workpiece pair by a combination of chemical and mechanical methods, solvents or chemicals are used to remove the adhesives primarily through dissolution, and a thin wire, filament, or blade is used to exert a cutting or wedging action between the carrier and workpiece. The two methods are used together during the debonding process. In the carrier-workpiece pair, the workpiece can be a semiconductor wafer that has been thinned and processed. The carrier and the workpiece are temporarily bonded using an adhesive dissolvable in a selected chemical or solvent. The chemical and mechanical debonding (CMDB) method can be carried out in solvent immersion or in solvent spray to provide high throughput debonding. The dissolved adhesives can be recycled and later reused, thus lowering the cost of the whole bonding and debonding process.Type: GrantFiled: March 8, 2018Date of Patent: February 9, 2021Assignee: DIDREW TECHNOLOGY (BVI) LIMITEDInventor: Chunbin Zhang
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Patent number: 10734326Abstract: Disclosed is a semiconductor device and method of manufacturing a semiconductor device that includes planarizing surfaces of a semiconductor substrate and a carrier substrate and then placing the semiconductor substrate on the carrier substrate such that the planarized surfaces of each are adjoining and allowing the semiconductor substrate to bond to the carrier substrate using a Van der Waals force. The method also includes forming a metal filled trench around the semiconductor substrate and in contact with the carrier substrate, which can also be formed of metal. The metal filled trench and carrier substrate together form a metal cage-like structure around the semiconductor substrate that can serve as a heat sink, integrated heat spreader, and Electro-Magnetic Interference shield for the semiconductor substrate.Type: GrantFiled: April 19, 2018Date of Patent: August 4, 2020Assignee: DiDrew Technology (BVI) LimitedInventors: Minghao Shen, Xiaotian Zhou, Xiaoming Du, Chunbin Zhang
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Publication number: 20190295877Abstract: Disclosed is a thin subject assisted debonding method for separating temporarily bonded workpiece-carrier pair. The thin subject can be a thin wire, or thin filament, or thin blade. The thin subject can be applied between the workpiece and carrier pair in association with laser debonding or mechanical debonding to provide well controlled and targeted wedging function to the delaminating temporary adhesive and its adjacent substrate to which it is separating from. The workpiece can be a semiconductor wafer that has been thinned and processed, and the carrier can be a semiconductor non-device wafer or any other rigid substrate such as a glass wafer or panel. The application of a thin subject between the workpiece and carrier during debonding provides the advantage of high throughput and low defect rate.Type: ApplicationFiled: April 27, 2018Publication date: September 26, 2019Applicant: DiDrew Technology (BVI) LimitedInventors: Chunbin Zhang, Xiaotian Zhou
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Publication number: 20190259675Abstract: Disclosed is a method of manufacturing a semiconductor device that includes a semiconductor die surrounded by a support frame for strengthening the semiconductor device compared to prior devices. A framing member is adhered to a carrier substrate along with dies that are positioned within through-holes in the framing member. The framing member and dies are encapsulated within a molding compound. The carrier substrate is then removed, and an RDL is formed on the dies. The resulting structure is then diced along portions of the framing structure into individual semiconductor devices, leaving portions of the framing structure in place and surrounding the dies as support frames.Type: ApplicationFiled: March 23, 2018Publication date: August 22, 2019Applicant: DiDrew Technology (BVI) LimitedInventors: Minghao Shen, Xiaoming Du
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Publication number: 20190252324Abstract: Disclosed is a semiconductor device and method of manufacturing a semiconductor device that includes planarizing surfaces of a semiconductor substrate and a carrier substrate and then placing the semiconductor substrate on the carrier substrate such that the planarized surfaces of each are adjoining and allowing the semiconductor substrate to bond to the carrier substrate using a Van der Waals force. The method also includes forming a metal filled trench around the semiconductor substrate and in contact with the carrier substrate, which can also be formed of metal. The metal filled trench and carrier substrate together form a metal cage-like structure around the semiconductor substrate that can serve as a heat sink, integrated heat spreader, and Electro-Magnetic Interference shield for the semiconductor substrate.Type: ApplicationFiled: April 19, 2018Publication date: August 15, 2019Applicant: DiDrew Technology (BVI) LimitedInventors: Minghao Shen, Xiaotian Zhou, Xiaoming Du, Chunbin Zhang
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Publication number: 20190252278Abstract: Disclosed is a method of manufacturing a semiconductor device that includes adhering a plurality of semiconductor substrates and a framing member to a supporting surface of a carrier substrate. The semiconductor substrates can be wafers that can be diced or cut into a plurality of dies. Thus, the wafers each have respective active surfaces and at least one respective integrated circuit region. The method can further include encapsulating the framing member and the plurality of semiconductor substrates within an encapsulant. Subsequently, the carrier substrate is removed and a redistribution layer (RDL) is formed on the semiconductor substrates and the framing member.Type: ApplicationFiled: March 23, 2018Publication date: August 15, 2019Applicant: DiDrew Technology (BVI) LimitedInventors: Minghao Shen, Xiaotian Zhou
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Patent number: 10347509Abstract: Disclosed is a method of manufacturing a semiconductor device that includes molding and curing a framing member having an upper side that defines an array of indentations. Semiconductor dies are then adhered to the framing member within respective indentations. The upper side of the framing member and the dies are covered with an RDL. Formation of the RDL includes deposition of a dielectric material that also fills gaps between the dies and the framing member within the indentations. The framing member can be molded to have a thickness that can provide mechanical strength to resist damage to the dies during the formation of the RDL or other manufacturing processes, for example due to warping of the dies. After the RDL is completed, this excess framing member material can then be removed from lower side of the framing member and the structure can be diced to separate the dies into respective semiconductor devices.Type: GrantFiled: March 29, 2018Date of Patent: July 9, 2019Assignee: DIDREW TECHNOLOGY (BVI) LIMITEDInventor: Minghao Shen
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Patent number: 10211077Abstract: A method of debonding a temporarily adhesive-bonded carrier-workpiece pair employs a stream of a solvent at a high pressure. The carrier and the workpiece are bonded with an adhesive that is dissolvable in a selected solvent. The workpiece such as a device wafer may have been thinned and processed. The solvent is applied to the adhesive at a high pressure to debond and dissolve the adhesive with high throughput. The dissolved adhesive can be recycled and later reused, thus lowering the cost of the whole bonding and debonding process.Type: GrantFiled: March 8, 2018Date of Patent: February 19, 2019Assignee: DIDREW TECHNOLOGY (BVI) LIMITEDInventor: Chunbin Zhang
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Patent number: 10209597Abstract: Disclosed is a display module and method of manufacturing the same, where the display module comprises a LCD panel, a driver IC for driving the LCD panel, and a FPC electrically coupled to the driver IC. The LCD panel includes an array of TFT pixels on a TFT array substrate. The TFT array substrate defines a driver cavity and one or more die cavities in which the driver IC and one or more other IC dies are disposed. The driver IC includes an image signal input pad and a driving signal output pad. The driver IC is configured to receive image signals from the FPC, to process the image signals into drive signals, and to transmit the drive signals to TFT pixels via an RDL electrical connection and a through-glass via through the TFT array substrate.Type: GrantFiled: April 20, 2018Date of Patent: February 19, 2019Assignee: DIDREW TECHNOLOGY (BVI) LIMITEDInventors: Minghao Shen, Xiaotian Zhou, Yijiang Hu, Shaolin Zou
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Patent number: 10209542Abstract: Disclosed is a display module and method of manufacturing the same, where the display module comprises a LCD panel, a driver IC for driving the LCD panel, and a FPC electrically coupled to the driver IC. The LCD panel includes an array of TFT pixels on a TFT array substrate. The TFT array substrate defines a driver cavity in which the driver IC is disposed. The driver IC includes an interface side and an opposing non-interface side. The interface side includes an image signal input pad and a driving signal output pad. The driver IC is configured to receive image signals from the FPC, to process the image signals into drive signals, and to transmit the drive signals to one or more of the plurality of TFT pixels via an RDL electrical connection.Type: GrantFiled: April 20, 2018Date of Patent: February 19, 2019Assignee: DIDREW TECHNOLOGY (BVI) LIMITEDInventor: Minghao Shen