Abstract: The present invention provides a cyclic AD converter that reduces power consumption by reducing active circuits such as an X2 amplifier or the like and is particularly suitable to implement in an integrated circuit and also an integrator to be used therefor. The cyclic AD converter uses an integrator 11 comprising an operational amplifier 111, a first integration capacitor C1 connected between the input and output terminals of the operational amplifier 111, and a second integration capacitor C2 to be connected selectively between the reference potential source and the input/output terminals of the operational amplifier 111 by way of switches S3 and S4. The integrator 11 operates to sample/hold an analog input signal and also obtain a signal equal to the double of a reference signal from a comparator.
Abstract: Disclosed is a pulse width modulation method and apparatus capable of expressing as many values as possible in a pulse width modulation (PWM) period, while maintaining the center of pulse energy substantially equal to the center of the PWM period. For this end, prepared is the PWM pattern generator 20 including 2 kinds of PWM pulse generator 21 and 22 for generating pulses having the pulse width of 0˜N times of the reference clock period in 1 PWM period corresponding to a predetermined number N of the reference clock period. The PWM pulse generators 21 and 22 are properly switched by the switching circuit 30 under control of the control circuit 40 for performing time averaging process so that the centers of energy of the output pulses is substantially equal to the center of the PWM period.
Abstract: The present invention provides a cyclic AD converter that reduces power consumption by reducing active circuits such as an X2 amplifier or the like and is particularly suitable to implement in an integrated circuit and also an integrator to be used therefor. The cyclic AD converter uses an integrator 11 comprising an operational amplifier 111, a first integration capacitor C1 connected between the input and output terminals of the operational amplifier 111, and a second integration capacitor C2 to be connected selectively between the reference potential source and the input/output terminals of the operational amplifier 111 by way of switches S3 and S4. The integrator 11 operates to sample/hold an analog input signal and also obtain a signal equal to the double of a reference signal from a comparator.