Abstract: An analog-to-digital converter includes a first converter stage comprising a successive-approximation-register (SAR) analog-to-digital converter (ADC), the SAR ADC being configured for voltage domain quantization, a second converter stage coupled to the first converter stage to quantize residual voltages of the voltage domain quantization, the second converter stage including a ring time-to-digital converter (TDC), and a third converter stage comprising an interpolation TDC, the interpolation TDC being coupled to the second converter stage to provide further time domain quantization.

Abstract: An analog-to-digital converter includes a first converter stage, a second converter stage coupled to the first converter stage to quantize a residue signal of the first converter stage, and an inter-stage converter disposed between the first and second converter stages. The inter-stage converter is configured to convert between a first domain and a second domain. The inter-stage converter is configured to process the residue signal of the first converter stage such that a range of the residue signal matches a full scale of the second converter stage.

Abstract: An analog-to-digital converter includes a first converter stage, a second converter stage coupled to the first converter stage to quantize a residue signal of the first converter stage, and an inter-stage converter disposed between the first and second converter stages. The inter-stage converter is configured to convert between a first domain and a second domain. The inter-stage converter is configured to process the residue signal of the first converter stage such that a range of the residue signal matches a full scale of the second converter stage.