Abstract: A PN junction having very low concentration gradients on both sides exhibits substantially increased breakdown voltages. A PN junction extending to the surface of a semiconductive body is formed by diffusing material of a first conductivity type into material of a second conductivity type in two stages: in the first stage, the surface concentration of impurity atoms is no higher than about 10.sup.16 per cc., and is always two to four orders of magnitude less than conventional junctions. In the second stage, the area of diffusion is smaller, so as to be surrounded by the area of said first stage diffusion, but concentration and depth are at normal levels, roughly 10.sup.17 - 10.sup.20. The higher the concentration is in the second stage, the greater the concentration difference between the two stages must be. Breakdown voltages of devices employing the junction of the invention are improved: planar transistors with BV.sub.cbo = 1000 volts may be produced.

Abstract: The voltage characteristics of switching integrated circuits of the type disclosed in U.S. Patent No. 3,918,083 are improved by employing a mesa-type etch to physically separate the four vertical transistors. Interconnection may be carried out by wire bonding respective collector and emitter areas or, preferably, passivating materials are used to fill the etched grooves and interconnection is carried out by vapor deposition (e.g. planar) techniques.

Abstract: A bilateral, switching integrated circuit is described in U.S. Pat. No. 3,918,083. The present application discloses variations of the basic structure and devices incorporating both the basic structure and the variants. Included are a photosensitive, zero-crossing optoisolator, relay structures, a switch of greatly increased light sensitivity employing photodarlingtons, and a dielectrically isolated switch that can be triggered by light or gated injection currents.

Abstract: A photosensitive integrated circuit switch that operates in the same manner as back-to-back photosensitive SCR's. The invention combines the monolithic, junction-isolated construction of the basic photrac, described in U.S. Pat. No. 3,918,083, and the operational characteristics of a dielectrically isolated photrac, described in co-pending application Ser. No. 616,040, but incorporates the single-quadrant gate-triggering feature of the latter. Its simplified construction makes it advantageous in many applications.