Abstract: The present disclosure discloses an electronic apparatus and manufacturing method thereof. The electronic apparatus includes a substrate, a first electrode member, and an electron transport film; the first electrode member is disposed on the substrate; the electron transport film is disposed on the first electrode member and includes nanoparticles provided with a first ligand having an electropositive property or an electronegative property.

Abstract: A display panel includes a display area and a frame area adjacent to the display area. The frame area includes a substrate, and a signal wiring, a planarization layer, a leading wiring, and an encapsulation layer sequentially disposed on the substrate, and the encapsulation layer includes a first inorganic layer disposed on the leading wiring. The display area includes the substrate, the planarization layer, and an anode disposed on a side of the planarization layer away from the substrate, and the leading wiring extends from the side of the anode to the frame area and is connected to the signal wiring. The display panel further includes a barrier layer disposed between the leading wiring and the first inorganic layer, and an orthographic projection of the barrier layer on the substrate covers an orthographic projection of the leading wiring on the substrate.

Abstract: A pixel driving circuit (31), comprising: a driving sub-circuit (311), a first light-emission control sub-circuit (312), a second light-emission control sub-circuit (313), a data write sub-circuit (314), a compensation sub-circuit (315) and a first reset sub-circuit (316). The driving sub-circuit (311) comprises a control end, a first end and a second end; and in an initialization phase (t1) in one display frame of the pixel driving circuit (31), the voltage difference between the control end of the driving sub-circuit (311) and the first end of the driving sub-circuit (311) is fixed.

Abstract: Provided are a display panel and a display device. The display panel includes a drive circuit including cascaded N stage shift registers. A shift register includes a control unit, an initial output unit and a first output unit. The control unit is configured to at least receive an input signal and control a signal of the first output node and a signal of the second output node. The initial output unit is configured to at least receive a signal of the first output node and a signal of the second output node, and control an initial output signal; the initial output signal of an xth stage shift register is the input signal of a yth stage shift register. The first output unit is configured to at least receive the signal of the first output node and the signal of the second output node, and control a first output signal.

Abstract: The present application provides a display panel and a display terminal. The display panel includes a first metal layer having a plurality of first fan-out segments, a second metal layer having a plurality of data wirings, and a third metal layer having a plurality of second fan-out segments, where the data wirings and the second fan-out segments extend in the same direction, the first fan-out segments and the second fan-out segments are located in a display area, a first end of one of the first fan-out segments is electrically connected to one of the data wirings, a second end of the first fan-out segment is electrically connected to one of the second fan-out segments, and the first direction is different from the second direction.

Abstract: An array substrate and a display panel are provided. In the array substrate, the cushioning structure is arranged below the second connecting line, the side of the cushioning structure close to the via hole extends beyond the second connecting line, the third connecting line overlaps with the second connecting line and a portion of the cushioning structure that extends beyond the second connecting line, and the third connecting line passes through the via hole to connect the first connecting line, so that the third connecting line can connect the first connecting line and the second connecting line to realize the line turning of the first connecting line, and a border of the array substrate is reduced compared with the double-hole connection method.

Abstract: A display panel and a display device are provided by the present application. A first part and a second part of part of a first scanning signal line are connected through a third part, and/or a fourth part and a fifth part of part of a third the first scanning signal line are connected through a sixth part, so that a load of a hole-digging area is similar or even consistent with a load of other areas, thereby improving a display effect.

Abstract: A liquid crystal display panel includes an array substrate, a color filter substrate, and liquid crystal molecules. The array substrate includes a first alignment layer, and the color filter substrate includes a second alignment layer opposite to the first alignment layer. The liquid crystal display panel has a first region and a second region. In a film thickness direction, a sum of a thickness of the first alignment layer and a thickness of the second alignment layer in the first region is greater than a sum of a thickness of the first alignment layer and a thickness of the second alignment layer in the second region.

Abstract: A gate driving circuit includes a plurality of stages of gate driving units and at least one repair line. A nth stage gate driving unit in the plurality of stages of gate driving units is connected to at least a first control signal line configured to receive a nth stage scan signal. The nth stage gate driving unit is configured to output a nth stage pulse signal under a control of the nth stage scan signal. The repair line intersects with the first control signal line, and disposed in different layers from the first control signal line. The repair line is configured to transmit a mth stage scan signal, both of n and m are positive integers greater than 0, and n is greater than or less than m.

Abstract: Embodiments of the present disclosure provide a flexible display device and a support assembly. The flexible display device includes a support assembly and a flexible display screen. A first support housing and a second support housing of the support assembly are slidable in a first direction by a plurality of first comb-teeth and a plurality of second comb-teeth alternately arranged. A first support portion of each of the first comb-teeth supports and abuts against a second stop portion of one of the second comb-teeth adjacent thereto, and a second support portion of each of the second comb-teeth supports and abuts against a first stop portion of one of the first comb-teeth adjacent thereto.

Abstract: A splicing assembly and a splicing display screen are disclosed. A first adjustment module includes a first support block and a first support pillar. The first support block is slidably connected to a support frame along a first direction. The first support pillar passes through the first support block and a connecting plate in sequence along a second direction. The first support pillar is screwed with the first support block, and the connecting plate is hung on the first support pillar. An adjusting part passes through the connecting plate along a third direction and abuts against the first support pillar, and the adjusting part is screwed with the connecting plate.

Abstract: An interface circuit and a display device are provided. The interface circuit is for use in the display device. The display device includes a main board and a logic board. The interface circuit includes a video transmission interface, an IIC communication interface, and an isolation circuit. The video transmission interface includes empty pins, allowing video signal transmission between the main board and the logic board. The IIC communication interface is obtained by defining the empty pins, enabling IIC signal transmission between the main board and the logic board. The isolation circuit is electrically connected to the IIC communication interface. The empty pins of the video transmission interface are defined as the IIC communication interface, satisfying the IIC communication requirements between the main board and the logic board, reducing the cost of the interface circuit, and not affecting the original video signal transmission function.

Abstract: A display substrate, a display device and a mask are provided. The display substrate includes a base substrate and a pixel electrode at a side of the base substrate; the pixel electrode includes at least two strip electrodes, a slit is provided between adjacent strip electrodes of the at least two strip electrodes, the slit at least includes a first corner end located on at least one end of the slit, the first corner end includes a first edge and a second edge oppositely disposed, and a first transition edge connecting an end of the first edge with an end of the second edge, the first transition edge has an arc shape protruding away from the first corner end; a first included angle is formed between the first and second edges, and the first included angle is greater than or equal to 0° and less than or equal to 13°.

Abstract: The application discloses a display module and a display device, comprising a flexible circuit board; the flexible circuit board includes a plurality of binding terminals and insulating parts; each of binding terminals includes a first sub-part and a second sub-part connected to each other, the flexible circuit board includes a first binding terminal and a second binding terminal, and the volume of the first sub-pare of the first binding terminal is larger than the volume of the first sub-part of the second binding terminal; and the insulating part includes a first insulating protrusion corresponding to the second binding terminal.

Abstract: A display including a pixel circuit is provided. The pixel circuit includes a driving transistor, a writing transistor connected in series between a data line and the second node or the third node, an initialization module, and a compensation transistor connected in series between the first node and the second node or the third node. In the driving transistor, a gate is connected to the first node, a first electrode is connected to the second node, and a second electrode is connected to the third node. A gate of the writing transistor is connected to a scanning signal. The initialization module is connected to the first, second, and/or third nodes to perform resetting. The compensation transistor remains a turned-on state in only one continuous time period in each frame, and the initialization module and the writing transistor turn on in a time-sharing manner in the continuous time period.

Abstract: The present application discloses a liquid crystal alignment method, a liquid crystal display panel, and a mobile terminal. In a liquid crystal alignment process, an external electrode receives an alignment voltage, and a pretilt angle of a liquid crystal molecule corresponding to a branch electrode is smaller than a pretilt angle of a liquid crystal molecule corresponding to a slit. In an actual driving process, because an overall pretilt angle of liquid crystal molecules is increased and pretilt angles in a same domain of a subpixel are differentiated, a response time and view angle features of medium and low grayscale of the liquid crystal display panel can be improved.

Abstract: A display substrate includes: a base substrate; a first conducting layer; a first insulating layer, where the first insulating layer is provided with a first opening; a second conducting layer, connected to the first conducting layer through the first opening, and including a first portion and a second portion, where the first portion is located within the first opening, and the second portion is located outside the first opening and located on the side of the first insulating layer facing away from the base substrate; and an inorganic protective layer including at least a first inorganic protective layer portion located between the second portion and the first insulating layer; in a direction perpendicular to the base substrate, the thickness h1 of the first inorganic protective layer portion and the thickness h2 of the second portion satisfy the following relationship: h2=K*h1, wherein 12?K?18.

Abstract: A display panel and a manufacturing method thereof are disclosed. The display panel includes a fingerprint recognition area and a touch control area surrounding the fingerprint recognition area. In the fingerprint recognition area, transparent conductive units in one direction are connected to form first electrodes by second connecting lines, and the transparent conductive units in another direction are bridged to form second electrodes by first connecting lines.

Abstract: A touch panel and a mobile terminal are disclosed in the embodiment of the present disclosure. The touch panel includes a touch layer, a signal line layer, and a plurality of redundant touch lines extending in a first direction. The touch layer includes a plurality of touch blocks, and one of the touch blocks includes a plurality of touch units. The signal line layer includes a plurality of signal units, and one of the signal units is electrically connected to one of the touch blocks. The redundant touch lines are insulated from the touch units, and one of the redundant touch lines or one of the signal units is disposed between two adjacent ones of the touch units.

Abstract: The present disclosure provides a timing control driving board, a display panel, and display device. The timing control driving board includes a power supply circuit, a power supply management circuit, an overvoltage protection circuit, and a transient voltage suppressor; a second end of the power supply circuit is connected to a first end of the overvoltage protection circuit; a second end of the overvoltage protection circuit is connected to a second end of the transient voltage suppressor and a second end of the power supply management circuit; and the overvoltage protection circuit is disconnected when an input voltage is higher than a first preset voltage.