Abstract: Video preprocessing methods and apparatus which utilize motion detection to control selective filtering of pels in a sequence of video frames wherein a video preprocessor generates first and second motion metrics for a given pel in a current frame N by taking the difference between the given pel and corresponding pels in a previous frame N-1 and a subsequent frame N+1, respectively. The motion metrics are converted to first and second bitmaps by thresholding the motion metric value against a first threshold. A motion detection metric is then generated for a given pel by summing the values of the first and second bitmaps for a group of pels which includes the given pel, and comparing the result to a predetermined threshold. The group of pels may include five pels on each of two lines above the given pel, and five pels on each of two lines below a given pel.

Abstract: A method and apparatus for prescaling graphics data for use in a graphics overlay operating mode of a set top box processing system. RGB pixel data for a given pixel are first converted to luminance and chrominance data for that pixel. The luminance and chrominance data are then prescaled by a blending value associated with the given pixel. An interpolation operation is performed on the luminance and chrominance data as well as on the blending value for the given pixel using corresponding luminance and chrominance data and blending values for at least one other pixel in the stream. This interpolation may include operations such as horizontal filtering and may also include chroma filtering to convert the luminance and chrominance data into a 4:2:2 chrominance format compatible with MPEG-2 video. The interpolation operation produces interpolated luminance and chrominance data and an interpolated blending value for the given pixel.

Abstract: A method and apparatus for dynamic alteration of a color look-up table (CLUT) pallet identifier in response to one or more key codes placed in an input data stream. An input data stream including a sequence of input data blocks is converted into a stream suitable for addressing a look-up table. The look-up table may be a 256.times.16 table which requires an 8-bit address to identify a particular table entry. The invention allows such a table to be addressed using 4-bit data blocks in the input data stream. For each received 4-bit data block in the input data stream, a determination is made as to whether that block corresponds to a predetermined key value. If a given input block does not correspond to the predetermined key value, the 4-bit input block is combined with a previously-stored 4-bit pallet identifier to generate an 8-bit address into the look-up table. The pallet identifier specifies one of 16 different 16-entry pallets within the 256.times.16 look-up table.

Abstract: A transport stream decoder/demultiplexer is provided which includes a program clock recovery circuit for recovering a program clock from program clock reference (PCR) values contained in selected transport packets. A processor is provided for extracting elementary stream data from transport packets labeled with packet identification codes (PIDs) that are specified by a host processor. The processor separately stores the elementary stream data of each stream. A host processor interface is also provided for transferring data between an external host processor and the program clock recovery circuit. A memory manager may be provided for storing the data extracted by the processor for each elementary stream in a corresponding queue. The queues may be maintained by the memory manager in an external RAM. A descrambler interface may be provided for transferring scrambled data and data derived from conditional access information between the processor and an external descrambler.

Abstract: The present invention relates to a method for dynamically allocating bandwidth to each encoder in an ensemble of video encoders whose output bit streams share a single communications channel. In accordance with the present invention, the channel bandwidth is allocated to the individual encoders in the ensemble in such a way that differences in a quality measure among the decoders are reduced. The quality measure includes a term that behaves like a peak-signal-to-noise ratio (PSNR) and a term that measures the "masking effect" in a video signal. The "masking effect" results because an encoded frame with a high visual complexity masks coding artifacts from the viewer when it is decoded and displayed.

Abstract: A remultiplexer is disclosed for communicating plural programs. Each program comprises one or more elementary streams that are encoded in relation to a single common time base corresponding to the respective program. The communicated programs originate from plural input transport streams that each comprises plural transport packets. Each transport packet contains a packet identifier indicating the data contained therein. Within each transport stream, unique packet identifiers are assigned to each elementary stream of each program. The data of each elementary stream is only contained in transport packets having a corresponding packet identifier. Each input transport stream contains time stamps for reconstructing the single program time base corresponding to each program conveyed therein. The remultiplexer has a data link module which receives the plural input transport streams. The data link module also selectively extracts transport packets from the received input transport streams.

Abstract: A method and apparatus for reducing program clock reference (PCR) jitter in transport packets of a transport stream compliant with MPEG-2 or another suitable audio-video encoding standard. The PCRs from a given single program transport stream (SPTS) of a multi-program transport stream are processed in a phase-locked loop (PLL) to generate dejittered PCRs for that SPTS. The PLL for a given SPTS receives as inputs the PCRs from that SPTS and a cycle count for each PCR indicative of the number of asynchronous clock cycles counted since the previous PCR. The PLL generates a given dejittered PCR as a function of the previous dejittered PCR, the cycle count for the given PCR, and a clock frequency mismatch estimate for the given program clock. The clock frequency mismatch estimate is generated by filtering a sequence of jitter estimates, each corresponding to the difference between a previous PCR and its corresponding dejittered PCR.

Abstract: A method and apparatus for differential video data encoding which utilizes a reduced number of bits per pixel to encode chroma and luma components of a video data stream. A 4-bit absolute code is determined for a given 8-bit luma or chroma component in the data stream. The determined absolute code is indicative of a particular one of a plurality of ranges into which the given component falls. The given component is encoded using the determined absolute code if the absolute code produces a lower encoding error than a 4-bit delta code which encodes the component as a difference relative to a previously-encoded component. If the delta code produces a lower encoding error than the determined absolute code, the given component is encoded using the delta code. In a situation in which the given component is the first component of its type on a line of video, an absolute code may be used regardless of whether or not the absolute code produces a higher encoding error than the delta code.

Abstract: A method and apparatus for use in a set top box processing system to permit simultaneous utilization of two system clocks in applications in which certain processing system elements utilize one system clock operating at a non-integer multiple of another system clock used by other processing system elements. A synchronous phase detector is used to generate a clock enable signal suitable for use in a pipeline structure to facilitate data transfer between the different elements of the processing system. The clock enable signal includes phase information extracted from the first and second clock signals, and is suitable for use in driving one or more multiplexers in a pipeline structure or other state-based logic device to thereby allow data transfer between an element of the processing system operating at the first clock rate and an element operating at the second clock rate.

Abstract: Successive frames in a video sequence are encoded by a video encoder. The bits are apportioned among successive frames to maximize overall perceived video quality when the encoded video sequence is decoded and displayed. The ongoing allocation process is constrained by the need to avoid decoder buffer exception, i.e., buffer underflow and overflow conditions, at the decoder.