Patents Assigned to #Dlabs, Inc., Ltd.
  • Configurable pipe delay with window overlap for DDR receive data
    Patent number: 6950350
    Abstract: A system for maximizing set up and hold times for data reads from a DDR memory device. The system adjusts timing of a strobe from a DDR memory device and converts data from the DDR memory device into a single-data-rate data. The timing adjustment is preferably controlled through software, and the system selectively determines if an extra half cycle should be added to the data path to optimize data reads.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: September 27, 2005
    Assignee: #Dlabs, Inc., Ltd.
    Inventor: Daniel L. Kerl