Abstract: A method for verifying an integrated circuit comprising components connected by connections, the integrated circuit being defined by “physical” and “schematic” representations, comprising the steps of: establishing an annotated physical description of the circuit which enables associating with each connection of the schematic representation several polygons of the physical representation forming a track; defining at least one type of electric signal capable of propagating on the connections; defining, for each signal type, rules to be verified by each track on which the considered type of signal can propagate, specific geometric features of a given track and/or features relative to the positioning of a given track with respect to other tracks having to be verified for each rule; determining, for each connection, whether the tracks associated with the studied connections verify the rules corresponding to the signal types capable of propagating on each connection.

Abstract: An integrated circuit comprising volatile memory elements, interface circuits connected to the volatile memory elements and, possibly, logic circuits not connected to the volatile memory elements and comprising first, second, and possibly third separate power supplies, the first power supply being connected to the volatile memory elements, the second power supply being connected to the interface circuits with the memory elements, and the third power supply being connected to other logic circuits.