Abstract: A CMOS image sensor and a method for fabricating the same are disclosed, in which the fabrication costs are reduced by reducing the number of photolithographic processes and yield is improved by obviating an alignment problem between color filter layers and microlenses. In one embodiment, the CMOS image sensor includes a sub layer provided with a unit pixel (e.g., a photodiode and various transistors), a planarization layer on the sub layer, and microlens-color filter structures formed on the planarization layer at constant intervals.
Abstract: A semiconductor package includes a semiconductor chip connected to lead frames by wires and outer leads protruding from the semiconductor package. At this time, the outer leads are connected to the lead frames and grooves into which the outer leads are inserted into are provided in the semiconductor package, wherein the grooves are connected the lead frames. In mounting a first and a second semiconductor package, the outer leads of the first semiconductor package are inserted into the grooves of the second semiconductor package.